diff options
| author | Artyom Tarasenko <atar4qemu@gmail.com> | 2016-02-09 12:07:48 +0100 |
|---|---|---|
| committer | Artyom Tarasenko <atar4qemu@gmail.com> | 2017-01-18 22:03:44 +0100 |
| commit | 96df2bc99f9bdaf7a2f13550111f219b72b73708 (patch) | |
| tree | 75ba7e0600ee74cee5e78670dacdf2ff3d57310e /target | |
| parent | 4797a6851975c1239df440c5f01d8566e63717bb (diff) | |
target-sparc: use SparcV9MMU type for sparc64 I/D-MMUs
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Diffstat (limited to 'target')
| -rw-r--r-- | target/sparc/cpu.h | 48 | ||||
| -rw-r--r-- | target/sparc/ldst_helper.c | 8 | ||||
| -rw-r--r-- | target/sparc/machine.c | 4 |
3 files changed, 24 insertions, 36 deletions
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 53afa18d6e..c92bd2527d 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -404,7 +404,22 @@ struct CPUTimer typedef struct CPUTimer CPUTimer; typedef struct CPUSPARCState CPUSPARCState; - +#if defined(TARGET_SPARC64) +typedef union { + uint64_t mmuregs[16]; + struct { + uint64_t tsb_tag_target; + uint64_t mmu_primary_context; + uint64_t mmu_secondary_context; + uint64_t sfsr; + uint64_t sfar; + uint64_t tsb; + uint64_t tag_access; + uint64_t virtual_watchpoint; + uint64_t physical_watchpoint; + }; +} SparcV9MMU; +#endif struct CPUSPARCState { target_ulong gregs[8]; /* general registers */ target_ulong *regwptr; /* pointer to current register window */ @@ -457,35 +472,8 @@ struct CPUSPARCState { uint64_t lsu; #define DMMU_E 0x8 #define IMMU_E 0x4 - //typedef struct SparcMMU - union { - uint64_t immuregs[16]; - struct { - uint64_t tsb_tag_target; - uint64_t unused_mmu_primary_context; // use DMMU - uint64_t unused_mmu_secondary_context; // use DMMU - uint64_t sfsr; - uint64_t sfar; - uint64_t tsb; - uint64_t tag_access; - uint64_t virtual_watchpoint; - uint64_t physical_watchpoint; - } immu; - }; - union { - uint64_t dmmuregs[16]; - struct { - uint64_t tsb_tag_target; - uint64_t mmu_primary_context; - uint64_t mmu_secondary_context; - uint64_t sfsr; - uint64_t sfar; - uint64_t tsb; - uint64_t tag_access; - uint64_t virtual_watchpoint; - uint64_t physical_watchpoint; - } dmmu; - }; + SparcV9MMU immu; + SparcV9MMU dmmu; SparcTLBEntry itlb[64]; SparcTLBEntry dtlb[64]; uint32_t mmu_version; diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c index 029120d1a0..a96b031082 100644 --- a/target/sparc/ldst_helper.c +++ b/target/sparc/ldst_helper.c @@ -1483,7 +1483,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, int reg = (addr >> 3) & 0xf; uint64_t oldreg; - oldreg = env->immuregs[reg]; + oldreg = env->immu.mmuregs[reg]; switch (reg) { case 0: /* RO */ return; @@ -1514,7 +1514,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, break; } - if (oldreg != env->immuregs[reg]) { + if (oldreg != env->immu.mmuregs[reg]) { DPRINTF_MMU("immu change reg[%d]: 0x%016" PRIx64 " -> 0x%016" PRIx64 "\n", reg, oldreg, env->immuregs[reg]); } @@ -1548,7 +1548,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, int reg = (addr >> 3) & 0xf; uint64_t oldreg; - oldreg = env->dmmuregs[reg]; + oldreg = env->dmmu.mmuregs[reg]; switch (reg) { case 0: /* RO */ case 4: @@ -1591,7 +1591,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, break; } - if (oldreg != env->dmmuregs[reg]) { + if (oldreg != env->dmmu.mmuregs[reg]) { DPRINTF_MMU("dmmu change reg[%d]: 0x%016" PRIx64 " -> 0x%016" PRIx64 "\n", reg, oldreg, env->dmmuregs[reg]); } diff --git a/target/sparc/machine.c b/target/sparc/machine.c index aea6397861..39e262ccd1 100644 --- a/target/sparc/machine.c +++ b/target/sparc/machine.c @@ -148,8 +148,8 @@ const VMStateDescription vmstate_sparc_cpu = { VMSTATE_UINT64_ARRAY(env.mmubpregs, SPARCCPU, 4), #else VMSTATE_UINT64(env.lsu, SPARCCPU), - VMSTATE_UINT64_ARRAY(env.immuregs, SPARCCPU, 16), - VMSTATE_UINT64_ARRAY(env.dmmuregs, SPARCCPU, 16), + VMSTATE_UINT64_ARRAY(env.immu.mmuregs, SPARCCPU, 16), + VMSTATE_UINT64_ARRAY(env.dmmu.mmuregs, SPARCCPU, 16), VMSTATE_STRUCT_ARRAY(env.itlb, SPARCCPU, 64, 0, vmstate_tlb_entry, SparcTLBEntry), VMSTATE_STRUCT_ARRAY(env.dtlb, SPARCCPU, 64, 0, |