diff options
| author | Andrew Jones <drjones@redhat.com> | 2019-03-25 14:16:47 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-03-25 14:16:47 +0000 |
| commit | cbbb3041fe2f57a475cef5d6b0ef836118aad106 (patch) | |
| tree | 195c73043388c64d878312bd6ccf5cc95b156e3e /target | |
| parent | da77e0fad445eda22277c786b7d45cd96b7c3b2a (diff) | |
target/arm: fix crash on pmu register access
Fix a QEMU NULL derefence that occurs when the guest attempts to
enable PMU counters with a non-v8 cpu model or a v8 cpu model
which has not configured a PMU.
Fixes: 4e7beb0cc0f3 ("target/arm: Add a timer to predict PMU counter overflow")
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190322162333.17159-2-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/helper.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index c8d3c213b6..fc73488f6c 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -1259,6 +1259,10 @@ static bool pmu_counter_enabled(CPUARMState *env, uint8_t counter) int el = arm_current_el(env); uint8_t hpmn = env->cp15.mdcr_el2 & MDCR_HPMN; + if (!arm_feature(env, ARM_FEATURE_PMU)) { + return false; + } + if (!arm_feature(env, ARM_FEATURE_EL2) || (counter < hpmn || counter == 31)) { e = env->cp15.c9_pmcr & PMCRE; |