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authorRichard Henderson <richard.henderson@linaro.org>2023-02-26 09:08:09 -1000
committerRichard Henderson <richard.henderson@linaro.org>2023-03-13 07:03:39 -0700
commit9d15d8e1bbc073d8ac5475562b5afee608ad27ff (patch)
tree0818d00c7a7556c9878913e27c2daaa26de55810 /target
parent4fe0e9db0a834111ae6ddc380986f4f56f28f3b6 (diff)
target/ppc: Fix gen_tlbsx_booke206
Fix incorrect read from rD. Avoid adding 0 when rA == 0. Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/ppc/translate.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index df324fc7ff..7ec940b7d8 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -5875,12 +5875,10 @@ static void gen_tlbsx_booke206(DisasContext *ctx)
CHK_SV(ctx);
if (rA(ctx->opcode)) {
t0 = tcg_temp_new();
- tcg_gen_mov_tl(t0, cpu_gpr[rD(ctx->opcode)]);
+ tcg_gen_add_tl(t0, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]);
} else {
- t0 = tcg_const_tl(0);
+ t0 = cpu_gpr[rB(ctx->opcode)];
}
-
- tcg_gen_add_tl(t0, t0, cpu_gpr[rB(ctx->opcode)]);
gen_helper_booke206_tlbsx(cpu_env, t0);
#endif /* defined(CONFIG_USER_ONLY) */
}