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authorMax Filippov <jcmvbkbc@gmail.com>2018-08-31 00:40:28 -0700
committerMax Filippov <jcmvbkbc@gmail.com>2018-09-17 11:09:04 -0700
commite8e05fd472cbe77650353eaa50d5a9703a91c1db (patch)
tree7743f1a6ab0600b9d1c7ea97c1789f53dcc585f9 /target/xtensa
parent3ee01413be6cd99a6014f49f06de709597fedf25 (diff)
target/xtensa: fix FPU2000 bugs
- FPU2000 defines rfr and wfr opcodes, not rfr.s and wfr.s; - movcond.s uses incorrect operand in tcg_gen_movcond: in case the condition is not satisfied it must not change its argument 0. Fixes: c04e1692e3aa ("target/xtensa: extract FPU2000 opcode translators") Cc: qemu-stable@nongnu.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target/xtensa')
-rw-r--r--target/xtensa/translate.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index d22cdcdb16..25399058a0 100644
--- a/target/xtensa/translate.c
+++ b/target/xtensa/translate.c
@@ -4706,7 +4706,7 @@ static void translate_movcond_s(DisasContext *dc, const uint32_t arg[],
tcg_gen_movcond_i32(par[0], cpu_FR[arg[0]],
cpu_R[arg[2]], zero,
- cpu_FR[arg[1]], cpu_FR[arg[2]]);
+ cpu_FR[arg[1]], cpu_FR[arg[0]]);
tcg_temp_free(zero);
}
}
@@ -4867,7 +4867,7 @@ static const XtensaOpcodeOps fpu2000_ops[] = {
.translate = translate_compare_s,
.par = (const uint32_t[]){COMPARE_OLT},
}, {
- .name = "rfr.s",
+ .name = "rfr",
.translate = translate_rfr_s,
}, {
.name = "round.s",
@@ -4921,7 +4921,7 @@ static const XtensaOpcodeOps fpu2000_ops[] = {
.translate = translate_ftoi_s,
.par = (const uint32_t[]){float_round_to_zero, true},
}, {
- .name = "wfr.s",
+ .name = "wfr",
.translate = translate_wfr_s,
},
};