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authorMax Filippov <jcmvbkbc@gmail.com>2018-08-28 14:52:27 -0700
committerMax Filippov <jcmvbkbc@gmail.com>2018-10-01 11:08:35 -0700
commit15477819427f5d2f0eddd4daba4159dee5f3b2ec (patch)
tree1ca56764eb6ff63f23b2ed8bd39c37e448310457 /target/xtensa
parent4c6ec5f3cd88cb27a4e40a480b34e433a725dc05 (diff)
target/xtensa: extract test for debug exception
- mark break and break.n instructions; - collect debug cause bits from parameter 0 of instructions marked for debug exception; - put debug exception check right after syscall check; Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target/xtensa')
-rw-r--r--target/xtensa/translate.c23
1 files changed, 13 insertions, 10 deletions
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index 69d3c583e8..570d4a39e2 100644
--- a/target/xtensa/translate.c
+++ b/target/xtensa/translate.c
@@ -959,6 +959,7 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
uint32_t arg[MAX_OPCODE_ARGS];
uint32_t raw_arg[MAX_OPCODE_ARGS];
} slot_prop[MAX_INSN_SLOTS];
+ uint32_t debug_cause = 0;
if (len == XTENSA_UNDEFINED) {
qemu_log_mask(LOG_GUEST_ERROR,
@@ -1040,6 +1041,9 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
gen_exception_cause(dc, ILLEGAL_INSTRUCTION_CAUSE);
return;
}
+ if (ops->op_flags & XTENSA_OP_DEBUG_BREAK) {
+ debug_cause |= ops->par[0];
+ }
}
if ((op_flags & XTENSA_OP_PRIVILEGED) &&
@@ -1052,6 +1056,11 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
return;
}
+ if ((op_flags & XTENSA_OP_DEBUG_BREAK) && dc->debug) {
+ gen_debug_exception(dc, debug_cause);
+ return;
+ }
+
for (slot = 0; slot < slots; ++slot) {
XtensaOpcodeOps *ops = slot_prop[slot].ops;
@@ -1515,14 +1524,6 @@ static void translate_bp(DisasContext *dc, const uint32_t arg[],
tcg_temp_free(tmp);
}
-static void translate_break(DisasContext *dc, const uint32_t arg[],
- const uint32_t par[])
-{
- if (dc->debug) {
- gen_debug_exception(dc, par[0]);
- }
-}
-
static void translate_call0(DisasContext *dc, const uint32_t arg[],
const uint32_t par[])
{
@@ -2827,12 +2828,14 @@ static const XtensaOpcodeOps core_ops[] = {
.par = (const uint32_t[]){TCG_COND_EQ},
}, {
.name = "break",
- .translate = translate_break,
+ .translate = translate_nop,
.par = (const uint32_t[]){DEBUGCAUSE_BI},
+ .op_flags = XTENSA_OP_DEBUG_BREAK,
}, {
.name = "break.n",
- .translate = translate_break,
+ .translate = translate_nop,
.par = (const uint32_t[]){DEBUGCAUSE_BN},
+ .op_flags = XTENSA_OP_DEBUG_BREAK,
}, {
.name = "bt",
.translate = translate_bp,