diff options
author | Max Filippov <jcmvbkbc@gmail.com> | 2021-04-15 13:38:08 -0700 |
---|---|---|
committer | Max Filippov <jcmvbkbc@gmail.com> | 2021-05-20 13:02:58 -0700 |
commit | cb2d627a00a6bf686bc221b05f136545639a1c37 (patch) | |
tree | 9be65853f3933113b51ba9266c010059a6827751 /target/xtensa | |
parent | 972e848b53970d12cb2ca64687ef8ff797fb6236 (diff) |
target/xtensa: don't generate extra EXCP_DEBUG on exception
target/xtensa used to generate an extra EXCP_DEBUG exception before the
first instruction executed after an interrupt or an exception is taken
to allow single-stepping that instruction in the debugger.
This is no longer needed after the following commits:
a7ba744f4082 ("tcg/cpu-exec: precise single-stepping after an exception")
ba3c35d9c402 ("tcg/cpu-exec: precise single-stepping after an interrupt")
Drop exception state tracking/extra EXCP_DEBUG generation code.
Cc: qemu-stable@nongnu.org # v5.1, v5.2, v6.0
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target/xtensa')
-rw-r--r-- | target/xtensa/cpu.c | 1 | ||||
-rw-r--r-- | target/xtensa/cpu.h | 7 | ||||
-rw-r--r-- | target/xtensa/exc_helper.c | 5 | ||||
-rw-r--r-- | target/xtensa/translate.c | 6 |
4 files changed, 0 insertions, 19 deletions
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index e2b2c7a71c..210ef80092 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -79,7 +79,6 @@ static void xtensa_cpu_reset(DeviceState *dev) xcc->parent_reset(dev); - env->exception_taken = 0; env->pc = env->config->exception_vector[EXC_RESET0 + env->static_vectors]; env->sregs[LITBASE] &= ~1; #ifndef CONFIG_USER_ONLY diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index 3bd4f691c1..2345cb59c7 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -540,7 +540,6 @@ typedef struct CPUXtensaState { uint32_t ccount_base; #endif - int exception_taken; int yield_needed; unsigned static_vectors; @@ -711,7 +710,6 @@ static inline int cpu_mmu_index(CPUXtensaState *env, bool ifetch) #define XTENSA_TBFLAG_ICOUNT 0x20 #define XTENSA_TBFLAG_CPENABLE_MASK 0x3fc0 #define XTENSA_TBFLAG_CPENABLE_SHIFT 6 -#define XTENSA_TBFLAG_EXCEPTION 0x4000 #define XTENSA_TBFLAG_WINDOW_MASK 0x18000 #define XTENSA_TBFLAG_WINDOW_SHIFT 15 #define XTENSA_TBFLAG_YIELD 0x20000 @@ -732,8 +730,6 @@ typedef XtensaCPU ArchCPU; static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc, target_ulong *cs_base, uint32_t *flags) { - CPUState *cs = env_cpu(env); - *pc = env->pc; *cs_base = 0; *flags = 0; @@ -782,9 +778,6 @@ static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc, if (xtensa_option_enabled(env->config, XTENSA_OPTION_COPROCESSOR)) { *flags |= env->sregs[CPENABLE] << XTENSA_TBFLAG_CPENABLE_SHIFT; } - if (cs->singlestep_enabled && env->exception_taken) { - *flags |= XTENSA_TBFLAG_EXCEPTION; - } if (xtensa_option_enabled(env->config, XTENSA_OPTION_WINDOWED_REGISTER) && (env->sregs[PS] & (PS_WOE | PS_EXCM)) == PS_WOE) { uint32_t windowstart = xtensa_replicate_windowstart(env) >> diff --git a/target/xtensa/exc_helper.c b/target/xtensa/exc_helper.c index 2f032bc053..10e75ab070 100644 --- a/target/xtensa/exc_helper.c +++ b/target/xtensa/exc_helper.c @@ -40,9 +40,6 @@ void HELPER(exception)(CPUXtensaState *env, uint32_t excp) if (excp == EXCP_YIELD) { env->yield_needed = 0; } - if (excp == EXCP_DEBUG) { - env->exception_taken = 0; - } cpu_loop_exit(cs); } @@ -197,7 +194,6 @@ static void handle_interrupt(CPUXtensaState *env) } env->sregs[PS] |= PS_EXCM; } - env->exception_taken = 1; } } @@ -242,7 +238,6 @@ void xtensa_cpu_do_interrupt(CPUState *cs) vector = env->config->exception_vector[cs->exception_index]; env->pc = relocated_vector(env, vector); - env->exception_taken = 1; } else { qemu_log_mask(CPU_LOG_INT, "%s(pc = %08x) bad exception_index: %d\n", diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 73584d9d60..f93df87ec4 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -1279,12 +1279,6 @@ static void xtensa_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) dc->base.is_jmp = DISAS_NORETURN; return; } - if (dc->base.tb->flags & XTENSA_TBFLAG_EXCEPTION) { - gen_exception(dc, EXCP_DEBUG); - dc->base.pc_next = dc->pc + 1; - dc->base.is_jmp = DISAS_NORETURN; - return; - } if (dc->icount) { TCGLabel *label = gen_new_label(); |