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authorMax Filippov <jcmvbkbc@gmail.com>2019-04-14 14:02:17 -0700
committerMax Filippov <jcmvbkbc@gmail.com>2019-05-14 13:19:35 -0700
commit75eed0e5f74a05ade59b874aff3b652b5ee2e47e (patch)
tree6fadd58727fe9a6351811bfda471c655337d6e59 /target/xtensa/translate.c
parent4d04ea35b30f9ba4097b746622eea07be3f2c363 (diff)
target/xtensa: implement DIWBUI.P opcode
This is a recent addition to the set of data cache opcodes. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target/xtensa/translate.c')
-rw-r--r--target/xtensa/translate.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index 782f2ec620..24eb70d619 100644
--- a/target/xtensa/translate.c
+++ b/target/xtensa/translate.c
@@ -1620,6 +1620,12 @@ static void translate_depbits(DisasContext *dc, const OpcodeArg arg[],
arg[2].imm, arg[3].imm);
}
+static void translate_diwbuip(DisasContext *dc, const OpcodeArg arg[],
+ const uint32_t par[])
+{
+ tcg_gen_addi_i32(arg[0].out, arg[0].in, dc->config->dcache_line_bytes);
+}
+
static bool test_ill_entry(DisasContext *dc, const OpcodeArg arg[],
const uint32_t par[])
{
@@ -3098,6 +3104,10 @@ static const XtensaOpcodeOps core_ops[] = {
.translate = translate_nop,
.op_flags = XTENSA_OP_PRIVILEGED,
}, {
+ .name = "diwbui.p",
+ .translate = translate_diwbuip,
+ .op_flags = XTENSA_OP_PRIVILEGED,
+ }, {
.name = "dpfl",
.translate = translate_dcache,
.op_flags = XTENSA_OP_PRIVILEGED,