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authorMax Filippov <jcmvbkbc@gmail.com>2018-08-27 21:43:43 -0700
committerMax Filippov <jcmvbkbc@gmail.com>2018-10-01 11:08:35 -0700
commit0946097051713031db1ff884c67081f291210ee2 (patch)
tree03c08eefabed09081c92d6cf54f611b08f6e6c75 /target/xtensa/cpu.h
parentc5e4e49258e9b89cb34c085a419dd9f862935c48 (diff)
target/xtensa: extract test for an illegal instruction
- TB flags: add XTENSA_TBFLAG_CWOE that corresponds to the architectural CWOE state; - entry: move CWOE check from the helper to the test_ill_entry; - retw: move CWOE check from the helper to the test_ill_retw; - separate instruction disassembly loop and translation loop; save disassembly results in local array; Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target/xtensa/cpu.h')
-rw-r--r--target/xtensa/cpu.h27
1 files changed, 26 insertions, 1 deletions
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index 1362772617..0a0323f386 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -217,6 +217,7 @@ enum {
#define MEMCTL_IL0EN 0x1
#define MAX_INSN_LENGTH 64
+#define MAX_INSN_SLOTS 32
#define MAX_OPCODE_ARGS 16
#define MAX_NAREG 64
#define MAX_NINTERRUPT 32
@@ -347,11 +348,34 @@ typedef struct XtensaMemory {
typedef struct DisasContext DisasContext;
typedef void (*XtensaOpcodeOp)(DisasContext *dc, const uint32_t arg[],
const uint32_t par[]);
+typedef bool (*XtensaOpcodeBoolTest)(DisasContext *dc,
+ const uint32_t arg[],
+ const uint32_t par[]);
+
+enum {
+ XTENSA_OP_ILL = 0x1,
+ XTENSA_OP_PRIVILEGED = 0x2,
+ XTENSA_OP_SYSCALL = 0x4,
+ XTENSA_OP_DEBUG_BREAK = 0x8,
+
+ XTENSA_OP_OVERFLOW = 0x10,
+ XTENSA_OP_UNDERFLOW = 0x20,
+ XTENSA_OP_ALLOCA = 0x40,
+ XTENSA_OP_COPROCESSOR = 0x80,
+
+ XTENSA_OP_DIVIDE_BY_ZERO = 0x100,
+
+ XTENSA_OP_CHECK_INTERRUPTS = 0x200,
+ XTENSA_OP_EXIT_TB_M1 = 0x400,
+ XTENSA_OP_EXIT_TB_0 = 0x800,
+};
typedef struct XtensaOpcodeOps {
const char *name;
XtensaOpcodeOp translate;
+ XtensaOpcodeBoolTest test_ill;
const uint32_t *par;
+ uint32_t op_flags;
} XtensaOpcodeOps;
typedef struct XtensaOpcodeTranslators {
@@ -661,6 +685,7 @@ static inline int cpu_mmu_index(CPUXtensaState *env, bool ifetch)
#define XTENSA_TBFLAG_WINDOW_MASK 0x18000
#define XTENSA_TBFLAG_WINDOW_SHIFT 15
#define XTENSA_TBFLAG_YIELD 0x20000
+#define XTENSA_TBFLAG_CWOE 0x40000
static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc,
target_ulong *cs_base, uint32_t *flags)
@@ -698,7 +723,7 @@ static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc,
(env->sregs[WINDOW_BASE] + 1);
uint32_t w = ctz32(windowstart | 0x8);
- *flags |= w << XTENSA_TBFLAG_WINDOW_SHIFT;
+ *flags |= (w << XTENSA_TBFLAG_WINDOW_SHIFT) | XTENSA_TBFLAG_CWOE;
} else {
*flags |= 3 << XTENSA_TBFLAG_WINDOW_SHIFT;
}