diff options
| author | Max Filippov <jcmvbkbc@gmail.com> | 2019-01-30 14:48:22 -0800 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2019-02-28 04:43:22 -0800 |
| commit | 45b71a795e5add347f0ba7aba526896132e9b986 (patch) | |
| tree | b27da096ac034904dd1f0c7de0f06701e2102295 /target/xtensa/cpu.h | |
| parent | 20e9fd0fc0634de24ee2763d769e3780e369afdd (diff) | |
target/xtensa: add generic instruction post-processing
Some opcodes may need additional actions at every exit from the
translated instruction or may need to amend TB exit slots available to
jumps generated for the instruction. Add gen_postprocess function and
call it from the gen_jump_slot and from the disas_xtensa_insn.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target/xtensa/cpu.h')
| -rw-r--r-- | target/xtensa/cpu.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index c59f79e563..a3bab9c5a2 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -368,9 +368,17 @@ enum { XTENSA_OP_DIVIDE_BY_ZERO = 0x100, + /* Postprocessing flags */ XTENSA_OP_CHECK_INTERRUPTS = 0x200, XTENSA_OP_EXIT_TB_M1 = 0x400, XTENSA_OP_EXIT_TB_0 = 0x800, + XTENSA_OP_SYNC_REGISTER_WINDOW = 0x1000, + + XTENSA_OP_POSTPROCESS = + XTENSA_OP_CHECK_INTERRUPTS | + XTENSA_OP_EXIT_TB_M1 | + XTENSA_OP_EXIT_TB_0 | + XTENSA_OP_SYNC_REGISTER_WINDOW, XTENSA_OP_NAME_ARRAY = 0x8000, |