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| author | Max Filippov <jcmvbkbc@gmail.com> | 2018-08-19 20:21:50 -0700 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2018-09-17 11:09:04 -0700 |
| commit | 3ee01413be6cd99a6014f49f06de709597fedf25 (patch) | |
| tree | 307a0950196ff1e68c7437198ffcbd1be1902b61 /target/xtensa/core-fsf.c | |
| parent | 76b7dd641fad4ab8c35f647cffe0fd47c4302b72 (diff) | |
tests/tcg/xtensa: add test for failed memory transactions
Failed memory transactions should raise exceptions 14 (for fetch) or 15
(for load/store) with XEA2.
Memory accesses that result in TLB miss followed by an attempt to load
PTE from physical memory which fails should raise InstTLBMiss or
LoadStoreTLBMiss with XEA2.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target/xtensa/core-fsf.c')
0 files changed, 0 insertions, 0 deletions