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author | Peter Maydell <peter.maydell@linaro.org> | 2020-10-19 16:12:58 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2020-10-20 16:12:01 +0100 |
commit | b7226369721896ab9ef71544e4fe95b40710e05a (patch) | |
tree | d510e6ef1a2432bdd5ca9bd0ec55b12dc08eadb0 /target/tricore | |
parent | 05903f036edba8e3ed940cc215b8e27fb49265b9 (diff) |
target/arm: Implement v8.1M low-overhead-loop instructions
v8.1M's "low-overhead-loop" extension has three instructions
for looping:
* DLS (start of a do-loop)
* WLS (start of a while-loop)
* LE (end of a loop)
The loop-start instructions are both simple operations to start a
loop whose iteration count (if any) is in LR. The loop-end
instruction handles "decrement iteration count and jump back to loop
start"; it also caches the information about the branch back to the
start of the loop to improve performance of the branch on subsequent
iterations.
As with the branch-future instructions, the architecture permits an
implementation to discard the LO_BRANCH_INFO cache at any time, and
QEMU takes the IMPDEF option to never set it in the first place
(equivalent to discarding it immediately), because for us a "real"
implementation would be unnecessary complexity.
(This implementation only provides the simple looping constructs; the
vector extension MVE (Helium) adds some extra variants to handle
looping across vectors. We'll add those later when we implement
MVE.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201019151301.2046-8-peter.maydell@linaro.org
Diffstat (limited to 'target/tricore')
0 files changed, 0 insertions, 0 deletions