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authorRichard Henderson <richard.henderson@linaro.org>2024-01-29 11:05:54 +1000
committerRichard Henderson <richard.henderson@linaro.org>2024-02-03 16:46:10 +1000
commiteafa0f68c3924df193b64c121657bbffe3248076 (patch)
tree9a04b6b6cdeb76049ad50b86a0c55ee12e24de89 /target/tricore
parente3547a7d0770ad3f8049d8f991abcf7756c0c96d (diff)
target/tricore: Populate CPUClass.mmu_index
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/tricore')
-rw-r--r--target/tricore/cpu.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
index e6d91c74b5..74e8a22b86 100644
--- a/target/tricore/cpu.c
+++ b/target/tricore/cpu.c
@@ -89,6 +89,11 @@ static bool tricore_cpu_has_work(CPUState *cs)
return true;
}
+static int tricore_cpu_mmu_index(CPUState *cs, bool ifetch)
+{
+ return 0;
+}
+
static void tricore_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
@@ -194,6 +199,7 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data)
&mcc->parent_phases);
cc->class_by_name = tricore_cpu_class_by_name;
cc->has_work = tricore_cpu_has_work;
+ cc->mmu_index = tricore_cpu_mmu_index;
cc->gdb_read_register = tricore_cpu_gdb_read_register;
cc->gdb_write_register = tricore_cpu_gdb_write_register;