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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-09-04 18:12:18 +0200 |
|---|---|---|
| committer | Markus Armbruster <armbru@redhat.com> | 2023-09-29 10:07:15 +0200 |
| commit | 81b8056a41eabff08e243c80b628fc18bfac2b73 (patch) | |
| tree | 679d0bee2e02ce760d25b1987976eedd00bd156e /target/tricore | |
| parent | 574d57254596d328d1a3c419e138e69369f2a98b (diff) | |
target/tricore: Clean up local variable shadowing
Fix:
target/tricore/translate.c:5016:18: warning: declaration of ‘temp’ shadows a previous local [-Wshadow=compatible-local]
5016 | TCGv temp = tcg_constant_i32(const9);
| ^~~~
target/tricore/translate.c:4958:10: note: shadowed declaration is here
4958 | TCGv temp;
| ^~~~
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20230904161235.84651-7-philmd@linaro.org>
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Diffstat (limited to 'target/tricore')
| -rw-r--r-- | target/tricore/translate.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 6ae5ccbf72..9ca211b2a8 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -4962,8 +4962,6 @@ static void decode_rc_logical_shift(DisasContext *ctx) const9 = MASK_OP_RC_CONST9(ctx->opcode); op2 = MASK_OP_RC_OP2(ctx->opcode); - temp = tcg_temp_new(); - switch (op2) { case OPC2_32_RC_AND: tcg_gen_andi_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); @@ -4972,10 +4970,12 @@ static void decode_rc_logical_shift(DisasContext *ctx) tcg_gen_andi_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], ~const9); break; case OPC2_32_RC_NAND: + temp = tcg_temp_new(); tcg_gen_movi_tl(temp, const9); tcg_gen_nand_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], temp); break; case OPC2_32_RC_NOR: + temp = tcg_temp_new(); tcg_gen_movi_tl(temp, const9); tcg_gen_nor_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], temp); break; @@ -5013,7 +5013,7 @@ static void decode_rc_logical_shift(DisasContext *ctx) break; case OPC2_32_RC_SHUFFLE: if (has_feature(ctx, TRICORE_FEATURE_162)) { - TCGv temp = tcg_constant_i32(const9); + temp = tcg_constant_i32(const9); gen_helper_shuffle(cpu_gpr_d[r2], cpu_gpr_d[r1], temp); } else { generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC); |