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authorBastian Koppelmann <kbastian@mail.uni-paderborn.de>2023-08-28 13:26:45 +0200
committerBastian Koppelmann <kbastian@mail.uni-paderborn.de>2023-09-28 10:45:22 +0200
commite43692bce684b76480df66473a9b3bec7a7d312a (patch)
tree0131838e0c4b78d041c60688f75ed52d831ba598 /target/tricore
parent2bdbe35632fc1f5f83054427085f59d28f45660f (diff)
target/tricore: Clarify special case for FTOUZ insn
this is not something other ISAs do, so clarify it with a comment. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230828112651.522058-6-kbastian@mail.uni-paderborn.de>
Diffstat (limited to 'target/tricore')
-rw-r--r--target/tricore/fpu_helper.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/target/tricore/fpu_helper.c b/target/tricore/fpu_helper.c
index 3aefeb776e..d0c474c5f3 100644
--- a/target/tricore/fpu_helper.c
+++ b/target/tricore/fpu_helper.c
@@ -475,6 +475,11 @@ uint32_t helper_ftouz(CPUTriCoreState *env, uint32_t arg)
if (float32_is_any_nan(f_arg)) {
result = 0;
}
+ /*
+ * we need to check arg < 0.0 before rounding as TriCore needs to raise
+ * float_flag_invalid as well. For instance, when we have a negative
+ * exponent and sign, softfloat would only raise float_flat_inexact.
+ */
} else if (float32_lt_quiet(f_arg, 0, &env->fp_status)) {
flags = float_flag_invalid;
result = 0;