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authorPeer Adelt <peer.adelt@c-lab.de>2016-06-07 17:49:14 +0200
committerBastian Koppelmann <kbastian@mail.uni-paderborn.de>2017-01-11 14:37:15 +0100
commit550929dd4622f8e2b1b5c277f32089d83cb1e595 (patch)
tree774453418b3d1bca5090cf2bfa39fe769a07f6aa /target/tricore/tricore-opcodes.h
parentddd7fead8c8524dc51b9b7c20b1f08a4b34ef653 (diff)
target-tricore: Added new MOV instruction variant
Puts the content of data register D[a] into E[c][63:32] and the content of data register D[b] into E[c][31:0]. [BK: fix style error] [BK: Allocate temporaries only when needed] Signed-off-by: Peer Adelt <peer.adelt@c-lab.de> Message-Id: <1465314555-11501-4-git-send-email-peer.adelt@c-lab.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Diffstat (limited to 'target/tricore/tricore-opcodes.h')
-rw-r--r--target/tricore/tricore-opcodes.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/tricore/tricore-opcodes.h b/target/tricore/tricore-opcodes.h
index df666b081f..78ba338640 100644
--- a/target/tricore/tricore-opcodes.h
+++ b/target/tricore/tricore-opcodes.h
@@ -1062,6 +1062,7 @@ enum {
OPC2_32_RR_MIN_H = 0x78,
OPC2_32_RR_MIN_HU = 0x79,
OPC2_32_RR_MOV = 0x1f,
+ OPC2_32_RR_MOV_64 = 0x81,
OPC2_32_RR_NE = 0x11,
OPC2_32_RR_OR_EQ = 0x27,
OPC2_32_RR_OR_GE = 0x2b,