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| author | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2016-10-06 16:46:36 +0200 |
|---|---|---|
| committer | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2017-01-11 14:36:51 +0100 |
| commit | 8f75983db8d67bce42332db7b38c62e2d45a5c7f (patch) | |
| tree | 510c1d728ca4af58d238b00182f6a52185b6b153 /target/tricore/translate.c | |
| parent | b44486dfb9447c88e4b216e730adcc780190852c (diff) | |
target-tricore: Added FTOUZ instruction
Converts a 32-bit floating point number to an unsigned int. The
result is rounded towards zero.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/tricore/translate.c')
| -rw-r--r-- | target/tricore/translate.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 36f734a662..eb6fdc3ca4 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -6698,6 +6698,9 @@ static void decode_rr_divide(CPUTriCoreState *env, DisasContext *ctx) case OPC2_32_RR_ITOF: gen_helper_itof(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]); break; + case OPC2_32_RR_FTOUZ: + gen_helper_ftouz(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]); + break; default: generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC); } |