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authorBastian Koppelmann <kbastian@mail.uni-paderborn.de>2023-06-12 13:32:45 +0200
committerBastian Koppelmann <kbastian@mail.uni-paderborn.de>2023-06-21 18:09:54 +0200
commit82736612e75b84f51d8f3529cb35fa3835de5741 (patch)
treed528827e1b6f14ce34af93ed660207a26fb6f32c /target/tricore/op_helper.c
parent6991777ec4b2a344d47bddec62744bedd9883d78 (diff)
target/tricore: Fix helper_ret() not correctly restoring PSW
We are always taking the TRICORE_FEATURE_13 branch as every CPU has TRICORE_FEATURE_13. For CPUs with ISA > 1.3 we have to take the else branch. We fix this by inverting the condition. We check for TRICORE_FEATURE_131, which every CPU except TRICORE_FEATURE_13 CPUs have. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1700 Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230612113245.56667-5-kbastian@mail.uni-paderborn.de>
Diffstat (limited to 'target/tricore/op_helper.c')
-rw-r--r--target/tricore/op_helper.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/target/tricore/op_helper.c b/target/tricore/op_helper.c
index 9a7a26b171..821a4b67cb 100644
--- a/target/tricore/op_helper.c
+++ b/target/tricore/op_helper.c
@@ -2584,12 +2584,12 @@ void helper_ret(CPUTriCoreState *env)
/* PCXI = new_PCXI; */
env->PCXI = new_PCXI;
- if (tricore_feature(env, TRICORE_FEATURE_13)) {
- /* PSW = new_PSW */
- psw_write(env, new_PSW);
- } else {
+ if (tricore_feature(env, TRICORE_FEATURE_131)) {
/* PSW = {new_PSW[31:26], PSW[25:24], new_PSW[23:0]}; */
psw_write(env, (new_PSW & ~(0x3000000)) + (psw & (0x3000000)));
+ } else { /* TRICORE_FEATURE_13 only */
+ /* PSW = new_PSW */
+ psw_write(env, new_PSW);
}
}