diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2017-10-20 00:30:24 -0700 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2017-10-24 21:49:30 +0200 |
commit | dc41aa7d34989b552efe712ffe184236216f960b (patch) | |
tree | 5e6ef18106283064430a63b38f52b9c10453ff78 /target/sparc | |
parent | 085272b35e0644fea373c33b5265c1818b7a978c (diff) |
tcg: Remove GET_TCGV_* and MAKE_TCGV_*
The GET and MAKE functions weren't really specific enough.
We now have a full complement of functions that convert exactly
between temporaries, arguments, tcgv pointers, and indices.
The target/sparc change is also a bug fix, which would have affected
a host that defines TCG_TARGET_HAS_extr[lh]_i64_i32, i.e. MIPS64.
Reviewed-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/sparc')
-rw-r--r-- | target/sparc/translate.c | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 6290705b11..83a7d8e3ee 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -171,18 +171,13 @@ static TCGv_i32 gen_load_fpr_F(DisasContext *dc, unsigned int src) return TCGV_HIGH(cpu_fpr[src / 2]); } #else + TCGv_i32 ret = get_temp_i32(dc); if (src & 1) { - return MAKE_TCGV_I32(GET_TCGV_I64(cpu_fpr[src / 2])); + tcg_gen_extrl_i64_i32(ret, cpu_fpr[src / 2]); } else { - TCGv_i32 ret = get_temp_i32(dc); - TCGv_i64 t = tcg_temp_new_i64(); - - tcg_gen_shri_i64(t, cpu_fpr[src / 2], 32); - tcg_gen_extrl_i64_i32(ret, t); - tcg_temp_free_i64(t); - - return ret; + tcg_gen_extrh_i64_i32(ret, cpu_fpr[src / 2]); } + return ret; #endif } @@ -195,7 +190,7 @@ static void gen_store_fpr_F(DisasContext *dc, unsigned int dst, TCGv_i32 v) tcg_gen_mov_i32(TCGV_HIGH(cpu_fpr[dst / 2]), v); } #else - TCGv_i64 t = MAKE_TCGV_I64(GET_TCGV_I32(v)); + TCGv_i64 t = (TCGv_i64)v; tcg_gen_deposit_i64(cpu_fpr[dst / 2], cpu_fpr[dst / 2], t, (dst & 1 ? 0 : 32), 32); #endif |