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| author | Richard Henderson <richard.henderson@linaro.org> | 2019-11-06 12:33:09 +0100 |
|---|---|---|
| committer | Laurent Vivier <laurent@vivier.eu> | 2019-11-06 13:35:25 +0100 |
| commit | f8a745974de88779b000d4882b24a37153da2445 (patch) | |
| tree | f58fd3c77bab8146ac74ae97d993d641052ce4c5 /target/sparc | |
| parent | 3d725434940696ebeb92ce6902edee868c46c1e2 (diff) | |
target/sparc: Define an enumeration for accessing env->regwptr
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20191106113318.10226-4-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'target/sparc')
| -rw-r--r-- | target/sparc/cpu.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 778aa8e073..ae97c7d9f7 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -13,6 +13,39 @@ /*#define EXCP_INTERRUPT 0x100*/ +/* Windowed register indexes. */ +enum { + WREG_O0, + WREG_O1, + WREG_O2, + WREG_O3, + WREG_O4, + WREG_O5, + WREG_O6, + WREG_O7, + + WREG_L0, + WREG_L1, + WREG_L2, + WREG_L3, + WREG_L4, + WREG_L5, + WREG_L6, + WREG_L7, + + WREG_I0, + WREG_I1, + WREG_I2, + WREG_I3, + WREG_I4, + WREG_I5, + WREG_I6, + WREG_I7, + + WREG_SP = WREG_O6, + WREG_FP = WREG_I6, +}; + /* trap definitions */ #ifndef TARGET_SPARC64 #define TT_TFAULT 0x01 |