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authorArtyom Tarasenko <atar4qemu@gmail.com>2012-01-23 14:31:21 +0100
committerArtyom Tarasenko <atar4qemu@gmail.com>2017-01-18 22:03:44 +0100
commit1ceca928538a3633b74a7dc718a05ce6767f2f76 (patch)
tree6408fa57917fcaceba7e49ddefaa2b04e1243d38 /target/sparc/cpu.h
parent23eb9e6b6d5315171cc15969bbc755f258004df0 (diff)
target-sparc: ignore MMU-faults if MMU is disabled in hypervisor mode
while IMMU/DMMU is disabled - ignore MMU-faults in hypervisorv mode or if CPU doesn't have hypervisor - signal TT_INSN_REAL_TRANSLATION_MISS/TT_DATA_REAL_TRANSLATION_MISS otherwise Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Diffstat (limited to 'target/sparc/cpu.h')
-rw-r--r--target/sparc/cpu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 601c018a05..e815a1949b 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -68,6 +68,8 @@
#define TT_DATA_ACCESS 0x32
#define TT_UNALIGNED 0x34
#define TT_PRIV_ACT 0x37
+#define TT_INSN_REAL_TRANSLATION_MISS 0x3e
+#define TT_DATA_REAL_TRANSLATION_MISS 0x3f
#define TT_EXTINT 0x40
#define TT_IVEC 0x60
#define TT_TMISS 0x64