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| author | Peter Maydell <peter.maydell@linaro.org> | 2017-10-25 16:38:57 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-10-25 16:38:57 +0100 |
| commit | ae49fbbcd8e4e9d8bf7131add34773f579e1aff7 (patch) | |
| tree | 5981acc5f85f69062f1e67bef90465295dac25c7 /target/sparc/cpu.c | |
| parent | 4e1b31dba8f66e337fbaf0166b7b8c440be78529 (diff) | |
| parent | cc689485ee3e9dca05765326ee8fd619a6ec48f0 (diff) | |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20171025' into staging
TCG patch queue
# gpg: Signature made Wed 25 Oct 2017 10:30:18 BST
# gpg: using RSA key 0x64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth/tags/pull-tcg-20171025: (51 commits)
translate-all: exit from tb_phys_invalidate if qht_remove fails
tcg: Initialize cpu_env generically
tcg: enable multiple TCG contexts in softmmu
tcg: introduce regions to split code_gen_buffer
translate-all: use qemu_protect_rwx/none helpers
osdep: introduce qemu_mprotect_rwx/none
tcg: allocate optimizer temps with tcg_malloc
tcg: distribute profiling counters across TCGContext's
tcg: introduce **tcg_ctxs to keep track of all TCGContext's
gen-icount: fold exitreq_label into TCGContext
tcg: define tcg_init_ctx and make tcg_ctx a pointer
tcg: take tb_ctx out of TCGContext
translate-all: report correct avg host TB size
exec-all: rename tb_free to tb_remove
translate-all: use a binary search tree to track TBs in TBContext
tcg: Remove CF_IGNORE_ICOUNT
tcg: Add CF_LAST_IO + CF_USE_ICOUNT to CF_HASH_MASK
cpu-exec: lookup/generate TB outside exclusive region during step_atomic
tcg: check CF_PARALLEL instead of parallel_cpus
target/sparc: check CF_PARALLEL instead of parallel_cpus
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/sparc/cpu.c')
| -rw-r--r-- | target/sparc/cpu.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index beab90f3e6..47d0927707 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -784,10 +784,6 @@ static void sparc_cpu_initfn(Object *obj) cs->env_ptr = env; - if (tcg_enabled()) { - gen_intermediate_code_init(env); - } - if (scc->cpu_def) { env->def = *scc->cpu_def; } @@ -891,6 +887,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data) cc->vmsd = &vmstate_sparc_cpu; #endif cc->disas_set_info = cpu_sparc_disas_set_info; + cc->tcg_initialize = sparc_tcg_init; #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) cc->gdb_num_core_regs = 86; |