diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2023-11-04 12:21:37 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-06-05 09:05:10 -0700 |
| commit | 3335a04806d337c69f44a707cdc27515d6c91d84 (patch) | |
| tree | f9fbfc1d70e2d389023f715b7b33f2a56f0f89f7 /target/sparc/cpu-feature.h.inc | |
| parent | 4fd71d19acd6e05b74927a0b5c4a5b0650e3d6f5 (diff) | |
target/sparc: Add feature bits for VIS 3
The manual separates VIS 3 and VIS 3B, even though they are both
present in all extant cpus. For clarity, let the translator
match the manual but otherwise leave them on the same feature bit.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/sparc/cpu-feature.h.inc')
| -rw-r--r-- | target/sparc/cpu-feature.h.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/sparc/cpu-feature.h.inc b/target/sparc/cpu-feature.h.inc index a30b9255b2..3913fb4a54 100644 --- a/target/sparc/cpu-feature.h.inc +++ b/target/sparc/cpu-feature.h.inc @@ -13,3 +13,4 @@ FEATURE(CACHE_CTRL) FEATURE(POWERDOWN) FEATURE(CASA) FEATURE(FMAF) +FEATURE(VIS3) |