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authorPeter Maydell <peter.maydell@linaro.org>2017-10-30 10:11:22 +0000
committerPeter Maydell <peter.maydell@linaro.org>2017-10-30 10:11:22 +0000
commitab752f237d755897735dc755182f60af39cbc5b6 (patch)
treec7c3ad0f9daf8405cf475730801421b5643e75f5 /target/sh4
parent953e35f69c302522c280e8d4e05995afc31da051 (diff)
parent1a26f46692320f1981c95967e0d5af4443b5f0b1 (diff)
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-request' into staging
x86/cpu/numa queue, 2017-10-27 # gpg: Signature made Fri 27 Oct 2017 15:17:12 BST # gpg: using RSA key 0x2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-and-machine-pull-request: (39 commits) x86: Skip check apic_id_limit for Xen numa: fixup parsed NumaNodeOptions earlier mips: r4k: replace cpu_model with cpu_type mips: mipssim: replace cpu_model with cpu_type mips: Magnum/Acer Pica 61: replace cpu_model with cpu_type mips: fulong2e: replace cpu_model with cpu_type mips: malta/boston: replace cpu_model with cpu_type mips: use object_new() instead of gnew()+object_initialize() sparc: leon3: use generic cpu_model parsing sparc: sparc: use generic cpu_model parsing sparc: sun4u/sun4v/niagara: use generic cpu_model parsing sparc: cleanup cpu type name composition tricore: use generic cpu_model parsing tricore: cleanup cpu type name composition unicore32: use generic cpu_model parsing unicore32: cleanup cpu type name composition xtensa: lx60/lx200/ml605/kc705: use generic cpu_model parsing xtensa: sim: use generic cpu_model parsing xtensa: cleanup cpu type name composition sh4: remove SuperHCPUClass::name field ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/sh4')
-rw-r--r--target/sh4/cpu-qom.h8
-rw-r--r--target/sh4/cpu.c107
-rw-r--r--target/sh4/cpu.h3
3 files changed, 46 insertions, 72 deletions
diff --git a/target/sh4/cpu-qom.h b/target/sh4/cpu-qom.h
index 01abb206e4..0f9fb4dd31 100644
--- a/target/sh4/cpu-qom.h
+++ b/target/sh4/cpu-qom.h
@@ -24,9 +24,9 @@
#define TYPE_SUPERH_CPU "superh-cpu"
-#define TYPE_SH7750R_CPU "sh7750r-" TYPE_SUPERH_CPU
-#define TYPE_SH7751R_CPU "sh7751r-" TYPE_SUPERH_CPU
-#define TYPE_SH7785_CPU "sh7785-" TYPE_SUPERH_CPU
+#define TYPE_SH7750R_CPU SUPERH_CPU_TYPE_NAME("sh7750r")
+#define TYPE_SH7751R_CPU SUPERH_CPU_TYPE_NAME("sh7751r")
+#define TYPE_SH7785_CPU SUPERH_CPU_TYPE_NAME("sh7785")
#define SUPERH_CPU_CLASS(klass) \
OBJECT_CLASS_CHECK(SuperHCPUClass, (klass), TYPE_SUPERH_CPU)
@@ -39,7 +39,6 @@
* SuperHCPUClass:
* @parent_realize: The parent class' realize handler.
* @parent_reset: The parent class' reset handler.
- * @name: The name.
* @pvr: Processor Version Register
* @prr: Processor Revision Register
* @cvr: Cache Version Register
@@ -54,7 +53,6 @@ typedef struct SuperHCPUClass {
DeviceRealize parent_realize;
void (*parent_reset)(CPUState *cpu);
- const char *name;
uint32_t pvr;
uint32_t prr;
uint32_t cvr;
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index 89abce2472..e0b99fbc89 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -98,12 +98,11 @@ static gint superh_cpu_list_compare(gconstpointer a, gconstpointer b)
static void superh_cpu_list_entry(gpointer data, gpointer user_data)
{
- ObjectClass *oc = data;
- SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
SuperHCPUListState *s = user_data;
+ const char *typename = object_class_get_name(OBJECT_CLASS(data));
+ int len = strlen(typename) - strlen(SUPERH_CPU_TYPE_SUFFIX);
- (*s->cpu_fprintf)(s->file, "%s\n",
- scc->name);
+ (*s->cpu_fprintf)(s->file, "%.*s\n", len, typename);
}
void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf)
@@ -120,36 +119,26 @@ void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf)
g_slist_free(list);
}
-static gint superh_cpu_name_compare(gconstpointer a, gconstpointer b)
-{
- const SuperHCPUClass *scc = SUPERH_CPU_CLASS(a);
- const char *name = b;
-
- return strcasecmp(scc->name, name);
-}
-
static ObjectClass *superh_cpu_class_by_name(const char *cpu_model)
{
ObjectClass *oc;
- GSList *list, *item;
+ char *s, *typename = NULL;
- if (strcasecmp(cpu_model, "any") == 0) {
- return object_class_by_name(TYPE_SH7750R_CPU);
+ s = g_ascii_strdown(cpu_model, -1);
+ if (strcmp(s, "any") == 0) {
+ oc = object_class_by_name(TYPE_SH7750R_CPU);
+ goto out;
}
- oc = object_class_by_name(cpu_model);
- if (oc != NULL && object_class_dynamic_cast(oc, TYPE_SUPERH_CPU) != NULL
- && !object_class_is_abstract(oc)) {
- return oc;
+ typename = g_strdup_printf(SUPERH_CPU_TYPE_NAME("%s"), s);
+ oc = object_class_by_name(typename);
+ if (oc != NULL && object_class_is_abstract(oc)) {
+ oc = NULL;
}
- oc = NULL;
- list = object_class_get_list(TYPE_SUPERH_CPU, false);
- item = g_slist_find_custom(list, cpu_model, superh_cpu_name_compare);
- if (item != NULL) {
- oc = item->data;
- }
- g_slist_free(list);
+out:
+ g_free(s);
+ g_free(typename);
return oc;
}
@@ -166,19 +155,11 @@ static void sh7750r_class_init(ObjectClass *oc, void *data)
{
SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
- scc->name = "SH7750R";
scc->pvr = 0x00050000;
scc->prr = 0x00000100;
scc->cvr = 0x00110000;
}
-static const TypeInfo sh7750r_type_info = {
- .name = TYPE_SH7750R_CPU,
- .parent = TYPE_SUPERH_CPU,
- .class_init = sh7750r_class_init,
- .instance_init = sh7750r_cpu_initfn,
-};
-
static void sh7751r_cpu_initfn(Object *obj)
{
SuperHCPU *cpu = SUPERH_CPU(obj);
@@ -192,19 +173,11 @@ static void sh7751r_class_init(ObjectClass *oc, void *data)
{
SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
- scc->name = "SH7751R";
scc->pvr = 0x04050005;
scc->prr = 0x00000113;
scc->cvr = 0x00110000; /* Neutered caches, should be 0x20480000 */
}
-static const TypeInfo sh7751r_type_info = {
- .name = TYPE_SH7751R_CPU,
- .parent = TYPE_SUPERH_CPU,
- .class_init = sh7751r_class_init,
- .instance_init = sh7751r_cpu_initfn,
-};
-
static void sh7785_cpu_initfn(Object *obj)
{
SuperHCPU *cpu = SUPERH_CPU(obj);
@@ -218,19 +191,11 @@ static void sh7785_class_init(ObjectClass *oc, void *data)
{
SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
- scc->name = "SH7785";
scc->pvr = 0x10300700;
scc->prr = 0x00000200;
scc->cvr = 0x71440211;
}
-static const TypeInfo sh7785_type_info = {
- .name = TYPE_SH7785_CPU,
- .parent = TYPE_SUPERH_CPU,
- .class_init = sh7785_class_init,
- .instance_init = sh7785_cpu_initfn,
-};
-
static void superh_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
@@ -300,22 +265,30 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data)
dc->vmsd = &vmstate_sh_cpu;
}
-static const TypeInfo superh_cpu_type_info = {
- .name = TYPE_SUPERH_CPU,
- .parent = TYPE_CPU,
- .instance_size = sizeof(SuperHCPU),
- .instance_init = superh_cpu_initfn,
- .abstract = true,
- .class_size = sizeof(SuperHCPUClass),
- .class_init = superh_cpu_class_init,
-};
+#define DEFINE_SUPERH_CPU_TYPE(type_name, cinit, initfn) \
+ { \
+ .name = type_name, \
+ .parent = TYPE_SUPERH_CPU, \
+ .class_init = cinit, \
+ .instance_init = initfn, \
+ }
+static const TypeInfo superh_cpu_type_infos[] = {
+ {
+ .name = TYPE_SUPERH_CPU,
+ .parent = TYPE_CPU,
+ .instance_size = sizeof(SuperHCPU),
+ .instance_init = superh_cpu_initfn,
+ .abstract = true,
+ .class_size = sizeof(SuperHCPUClass),
+ .class_init = superh_cpu_class_init,
+ },
+ DEFINE_SUPERH_CPU_TYPE(TYPE_SH7750R_CPU, sh7750r_class_init,
+ sh7750r_cpu_initfn),
+ DEFINE_SUPERH_CPU_TYPE(TYPE_SH7751R_CPU, sh7751r_class_init,
+ sh7751r_cpu_initfn),
+ DEFINE_SUPERH_CPU_TYPE(TYPE_SH7785_CPU, sh7785_class_init,
+ sh7785_cpu_initfn),
-static void superh_cpu_register_types(void)
-{
- type_register_static(&superh_cpu_type_info);
- type_register_static(&sh7750r_type_info);
- type_register_static(&sh7751r_type_info);
- type_register_static(&sh7785_type_info);
-}
+};
-type_init(superh_cpu_register_types)
+DEFINE_TYPES(superh_cpu_type_infos)
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index 123f34783a..960b46870d 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -274,6 +274,9 @@ void cpu_load_tlb(CPUSH4State * env);
#define cpu_init(cpu_model) cpu_generic_init(TYPE_SUPERH_CPU, cpu_model)
+#define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU
+#define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX
+
#define cpu_signal_handler cpu_sh4_signal_handler
#define cpu_list sh4_cpu_list