diff options
| author | Aurelien Jarno <aurelien@aurel32.net> | 2017-05-01 23:20:43 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2017-05-13 11:18:27 +0200 |
| commit | 34257c2117209573ddff290128d4192cf9bbdf23 (patch) | |
| tree | 6593fbf774d66c1d37dace6efe0e7bf00dfe47a4 /target/sh4/op_helper.c | |
| parent | 143021b26ffe1a468236c824003caaf4fd7d4831 (diff) | |
target/sh4: trap unaligned accesses
SH4 requires that memory accesses are naturally aligned, except for the
SH4-A movua.l instructions which can do unaligned loads.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target/sh4/op_helper.c')
| -rw-r--r-- | target/sh4/op_helper.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c index 684d3f3758..fa238c660e 100644 --- a/target/sh4/op_helper.c +++ b/target/sh4/op_helper.c @@ -24,6 +24,22 @@ #ifndef CONFIG_USER_ONLY +void superh_cpu_do_unaligned_access(CPUState *cs, vaddr addr, + MMUAccessType access_type, + int mmu_idx, uintptr_t retaddr) +{ + switch (access_type) { + case MMU_INST_FETCH: + case MMU_DATA_LOAD: + cs->exception_index = 0x0e0; + break; + case MMU_DATA_STORE: + cs->exception_index = 0x100; + break; + } + cpu_loop_exit_restore(cs, retaddr); +} + void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { |