diff options
| author | Richard Henderson <rth@twiddle.net> | 2017-07-18 10:02:31 -1000 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2017-07-18 23:39:16 +0200 |
| commit | 4bfa602bc2227f5b5a506a4c0c20657d68eaefd1 (patch) | |
| tree | 4c74bbd8d12c615eb75beaf01938dc63ea01f1b3 /target/sh4/op_helper.c | |
| parent | 1516184d8ea04f9ebd5d5c2009a2b795fc33b82a (diff) | |
target/sh4: Handle user-space atomics
For uniprocessors, SH4 uses optimistic restartable atomic sequences.
Upon an interrupt, a real kernel would simply notice magic values in
the registers and reset the PC to the start of the sequence.
For QEMU, we cannot do this in quite the same way. Instead, we notice
the normal start of such a sequence (mov #-x,r15), and start a new TB
that can be executed under cpu_exec_step_atomic.
Reported-by: Bruno Haible <bruno@clisp.org>
LP: https://bugs.launchpad.net/bugs/1701971
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-Id: <20170718200255.31647-7-rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target/sh4/op_helper.c')
| -rw-r--r-- | target/sh4/op_helper.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c index c3d19b1f61..8513f38849 100644 --- a/target/sh4/op_helper.c +++ b/target/sh4/op_helper.c @@ -115,6 +115,12 @@ void helper_trapa(CPUSH4State *env, uint32_t tra) raise_exception(env, 0x160, 0); } +void helper_exclusive(CPUSH4State *env) +{ + /* We do not want cpu_restore_state to run. */ + cpu_loop_exit_atomic(ENV_GET_CPU(env), 0); +} + void helper_movcal(CPUSH4State *env, uint32_t address, uint32_t value) { if (cpu_sh4_is_cached (env, address)) |