diff options
author | Aurelien Jarno <aurelien@aurel32.net> | 2017-05-17 00:48:18 +0200 |
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committer | Aurelien Jarno <aurelien@aurel32.net> | 2017-05-30 21:00:56 +0200 |
commit | 9a562ae7ba0cadacd2fe2c8c895b0840556b978f (patch) | |
tree | 51fb4818af921ca4a455f8eb225e0a9098319060 /target/sh4/cpu.h | |
parent | 73479c5c87bf431c6344a80ab01456ed979447f1 (diff) |
target/sh4: introduce DELAY_SLOT_MASK
This will make easier the introduction of a new flag in the next
patches.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target/sh4/cpu.h')
-rw-r--r-- | target/sh4/cpu.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 6c07c6b24b..7969c9af98 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -91,6 +91,7 @@ #define FPSCR_RM_NEAREST (0 << 0) #define FPSCR_RM_ZERO (1 << 0) +#define DELAY_SLOT_MASK 0x3 #define DELAY_SLOT (1 << 0) #define DELAY_SLOT_CONDITIONAL (1 << 1) @@ -380,7 +381,7 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc, { *pc = env->pc; *cs_base = 0; - *flags = (env->flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL)) /* Bits 0-1 */ + *flags = (env->flags & DELAY_SLOT_MASK) /* Bits 0- 1 */ | (env->fpscr & (FPSCR_FR | FPSCR_SZ | FPSCR_PR)) /* Bits 19-21 */ | (env->sr & ((1u << SR_MD) | (1u << SR_RB))) /* Bits 29-30 */ | (env->sr & (1u << SR_FD)) /* Bit 15 */ |