diff options
| author | Aurelien Jarno <aurelien@aurel32.net> | 2017-05-01 23:20:43 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2017-05-13 11:18:27 +0200 |
| commit | 34257c2117209573ddff290128d4192cf9bbdf23 (patch) | |
| tree | 6593fbf774d66c1d37dace6efe0e7bf00dfe47a4 /target/sh4/cpu.h | |
| parent | 143021b26ffe1a468236c824003caaf4fd7d4831 (diff) | |
target/sh4: trap unaligned accesses
SH4 requires that memory accesses are naturally aligned, except for the
SH4-A movua.l instructions which can do unaligned loads.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target/sh4/cpu.h')
| -rw-r--r-- | target/sh4/cpu.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index faab3012f9..6c07c6b24b 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -24,6 +24,7 @@ #include "cpu-qom.h" #define TARGET_LONG_BITS 32 +#define ALIGNED_ONLY /* CPU Subtypes */ #define SH_CPU_SH7750 (1 << 0) @@ -215,6 +216,9 @@ void superh_cpu_dump_state(CPUState *cpu, FILE *f, hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int superh_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int superh_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); +void superh_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, + MMUAccessType access_type, + int mmu_idx, uintptr_t retaddr); void sh4_translate_init(void); SuperHCPU *cpu_sh4_init(const char *cpu_model); |