diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2023-09-13 16:37:36 -0700 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2023-10-03 08:01:02 -0700 |
commit | ad75a51e84af9638e4ec51aa1e6ec5f3ff642558 (patch) | |
tree | d6d2af739fb0a9a5dfcd6871a9271eccdf54ab5b /target/s390x | |
parent | a953b5fa153fc384d2631cda8213efe983501609 (diff) |
tcg: Rename cpu_env to tcg_env
Allow the name 'cpu_env' to be used for something else.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/s390x')
-rw-r--r-- | target/s390x/tcg/translate.c | 424 | ||||
-rw-r--r-- | target/s390x/tcg/translate_vx.c.inc | 104 |
2 files changed, 264 insertions, 264 deletions
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index dc7041e1d8..22f43974dd 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -199,28 +199,28 @@ void s390x_translate_init(void) { int i; - psw_addr = tcg_global_mem_new_i64(cpu_env, + psw_addr = tcg_global_mem_new_i64(tcg_env, offsetof(CPUS390XState, psw.addr), "psw_addr"); - psw_mask = tcg_global_mem_new_i64(cpu_env, + psw_mask = tcg_global_mem_new_i64(tcg_env, offsetof(CPUS390XState, psw.mask), "psw_mask"); - gbea = tcg_global_mem_new_i64(cpu_env, + gbea = tcg_global_mem_new_i64(tcg_env, offsetof(CPUS390XState, gbea), "gbea"); - cc_op = tcg_global_mem_new_i32(cpu_env, offsetof(CPUS390XState, cc_op), + cc_op = tcg_global_mem_new_i32(tcg_env, offsetof(CPUS390XState, cc_op), "cc_op"); - cc_src = tcg_global_mem_new_i64(cpu_env, offsetof(CPUS390XState, cc_src), + cc_src = tcg_global_mem_new_i64(tcg_env, offsetof(CPUS390XState, cc_src), "cc_src"); - cc_dst = tcg_global_mem_new_i64(cpu_env, offsetof(CPUS390XState, cc_dst), + cc_dst = tcg_global_mem_new_i64(tcg_env, offsetof(CPUS390XState, cc_dst), "cc_dst"); - cc_vr = tcg_global_mem_new_i64(cpu_env, offsetof(CPUS390XState, cc_vr), + cc_vr = tcg_global_mem_new_i64(tcg_env, offsetof(CPUS390XState, cc_vr), "cc_vr"); for (i = 0; i < 16; i++) { snprintf(cpu_reg_names[i], sizeof(cpu_reg_names[0]), "r%d", i); - regs[i] = tcg_global_mem_new(cpu_env, + regs[i] = tcg_global_mem_new(tcg_env, offsetof(CPUS390XState, regs[i]), cpu_reg_names[i]); } @@ -290,7 +290,7 @@ static TCGv_i64 load_freg(int reg) { TCGv_i64 r = tcg_temp_new_i64(); - tcg_gen_ld_i64(r, cpu_env, freg64_offset(reg)); + tcg_gen_ld_i64(r, tcg_env, freg64_offset(reg)); return r; } @@ -298,7 +298,7 @@ static TCGv_i64 load_freg32_i64(int reg) { TCGv_i64 r = tcg_temp_new_i64(); - tcg_gen_ld32u_i64(r, cpu_env, freg32_offset(reg)); + tcg_gen_ld32u_i64(r, tcg_env, freg32_offset(reg)); return r; } @@ -319,7 +319,7 @@ static void store_reg(int reg, TCGv_i64 v) static void store_freg(int reg, TCGv_i64 v) { - tcg_gen_st_i64(v, cpu_env, freg64_offset(reg)); + tcg_gen_st_i64(v, tcg_env, freg64_offset(reg)); } static void store_reg32_i64(int reg, TCGv_i64 v) @@ -335,7 +335,7 @@ static void store_reg32h_i64(int reg, TCGv_i64 v) static void store_freg32_i64(int reg, TCGv_i64 v) { - tcg_gen_st32_i64(v, cpu_env, freg32_offset(reg)); + tcg_gen_st32_i64(v, tcg_env, freg32_offset(reg)); } static void update_psw_addr(DisasContext *s) @@ -351,7 +351,7 @@ static void per_branch(DisasContext *s, bool to_next) if (s->base.tb->flags & FLAG_MASK_PER) { TCGv_i64 next_pc = to_next ? tcg_constant_i64(s->pc_tmp) : psw_addr; - gen_helper_per_branch(cpu_env, gbea, next_pc); + gen_helper_per_branch(tcg_env, gbea, next_pc); } #endif } @@ -365,7 +365,7 @@ static void per_branch_cond(DisasContext *s, TCGCond cond, tcg_gen_brcond_i64(tcg_invert_cond(cond), arg1, arg2, lab); tcg_gen_movi_i64(gbea, s->base.pc_next); - gen_helper_per_branch(cpu_env, gbea, psw_addr); + gen_helper_per_branch(tcg_env, gbea, psw_addr); gen_set_label(lab); } else { @@ -424,16 +424,16 @@ static int get_mem_index(DisasContext *s) static void gen_exception(int excp) { - gen_helper_exception(cpu_env, tcg_constant_i32(excp)); + gen_helper_exception(tcg_env, tcg_constant_i32(excp)); } static void gen_program_exception(DisasContext *s, int code) { /* Remember what pgm exception this was. */ - tcg_gen_st_i32(tcg_constant_i32(code), cpu_env, + tcg_gen_st_i32(tcg_constant_i32(code), tcg_env, offsetof(CPUS390XState, int_pgm_code)); - tcg_gen_st_i32(tcg_constant_i32(s->ilen), cpu_env, + tcg_gen_st_i32(tcg_constant_i32(s->ilen), tcg_env, offsetof(CPUS390XState, int_pgm_ilen)); /* update the psw */ @@ -453,7 +453,7 @@ static inline void gen_illegal_opcode(DisasContext *s) static inline void gen_data_exception(uint8_t dxc) { - gen_helper_data_exception(cpu_env, tcg_constant_i32(dxc)); + gen_helper_data_exception(tcg_env, tcg_constant_i32(dxc)); } static inline void gen_trap(DisasContext *s) @@ -620,7 +620,7 @@ static void gen_op_calc_cc(DisasContext *s) case CC_OP_LCBB: case CC_OP_MULS_32: /* 1 argument */ - gen_helper_calc_cc(cc_op, cpu_env, local_cc_op, dummy, cc_dst, dummy); + gen_helper_calc_cc(cc_op, tcg_env, local_cc_op, dummy, cc_dst, dummy); break; case CC_OP_ADDU: case CC_OP_ICM: @@ -636,18 +636,18 @@ static void gen_op_calc_cc(DisasContext *s) case CC_OP_VC: case CC_OP_MULS_64: /* 2 arguments */ - gen_helper_calc_cc(cc_op, cpu_env, local_cc_op, cc_src, cc_dst, dummy); + gen_helper_calc_cc(cc_op, tcg_env, local_cc_op, cc_src, cc_dst, dummy); break; case CC_OP_ADD_64: case CC_OP_SUB_64: case CC_OP_ADD_32: case CC_OP_SUB_32: /* 3 arguments */ - gen_helper_calc_cc(cc_op, cpu_env, local_cc_op, cc_src, cc_dst, cc_vr); + gen_helper_calc_cc(cc_op, tcg_env, local_cc_op, cc_src, cc_dst, cc_vr); break; case CC_OP_DYNAMIC: /* unknown operation - assume 3 arguments and cc_op in env */ - gen_helper_calc_cc(cc_op, cpu_env, cc_op, cc_src, cc_dst, cc_vr); + gen_helper_calc_cc(cc_op, tcg_env, cc_op, cc_src, cc_dst, cc_vr); break; default: g_assert_not_reached(); @@ -1398,19 +1398,19 @@ static DisasJumpType op_asiu64(DisasContext *s, DisasOps *o) static DisasJumpType op_aeb(DisasContext *s, DisasOps *o) { - gen_helper_aeb(o->out, cpu_env, o->in1, o->in2); + gen_helper_aeb(o->out, tcg_env, o->in1, o->in2); return DISAS_NEXT; } static DisasJumpType op_adb(DisasContext *s, DisasOps *o) { - gen_helper_adb(o->out, cpu_env, o->in1, o->in2); + gen_helper_adb(o->out, tcg_env, o->in1, o->in2); return DISAS_NEXT; } static DisasJumpType op_axb(DisasContext *s, DisasOps *o) { - gen_helper_axb(o->out_128, cpu_env, o->in1_128, o->in2_128); + gen_helper_axb(o->out_128, tcg_env, o->in1_128, o->in2_128); return DISAS_NEXT; } @@ -1546,7 +1546,7 @@ static DisasJumpType op_bal(DisasContext *s, DisasOps *o) if (have_field(s, ri)) { \ if (unlikely(s->ex_value)) { \ cdest = tcg_temp_new_i64(); \ - tcg_gen_ld_i64(cdest, cpu_env, offsetof(CPUS390XState, ex_target));\ + tcg_gen_ld_i64(cdest, tcg_env, offsetof(CPUS390XState, ex_target));\ tcg_gen_addi_i64(cdest, cdest, (int64_t)get_field(s, ri) * 2); \ is_imm = false; \ } else { \ @@ -1734,21 +1734,21 @@ static DisasJumpType op_cj(DisasContext *s, DisasOps *o) static DisasJumpType op_ceb(DisasContext *s, DisasOps *o) { - gen_helper_ceb(cc_op, cpu_env, o->in1, o->in2); + gen_helper_ceb(cc_op, tcg_env, o->in1, o->in2); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_cdb(DisasContext *s, DisasOps *o) { - gen_helper_cdb(cc_op, cpu_env, o->in1, o->in2); + gen_helper_cdb(cc_op, tcg_env, o->in1, o->in2); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_cxb(DisasContext *s, DisasOps *o) { - gen_helper_cxb(cc_op, cpu_env, o->in1_128, o->in2_128); + gen_helper_cxb(cc_op, tcg_env, o->in1_128, o->in2_128); set_cc_static(s); return DISAS_NEXT; } @@ -1785,7 +1785,7 @@ static DisasJumpType op_cfeb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_cfeb(o->out, cpu_env, o->in2, m34); + gen_helper_cfeb(o->out, tcg_env, o->in2, m34); set_cc_static(s); return DISAS_NEXT; } @@ -1797,7 +1797,7 @@ static DisasJumpType op_cfdb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_cfdb(o->out, cpu_env, o->in2, m34); + gen_helper_cfdb(o->out, tcg_env, o->in2, m34); set_cc_static(s); return DISAS_NEXT; } @@ -1809,7 +1809,7 @@ static DisasJumpType op_cfxb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_cfxb(o->out, cpu_env, o->in2_128, m34); + gen_helper_cfxb(o->out, tcg_env, o->in2_128, m34); set_cc_static(s); return DISAS_NEXT; } @@ -1821,7 +1821,7 @@ static DisasJumpType op_cgeb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_cgeb(o->out, cpu_env, o->in2, m34); + gen_helper_cgeb(o->out, tcg_env, o->in2, m34); set_cc_static(s); return DISAS_NEXT; } @@ -1833,7 +1833,7 @@ static DisasJumpType op_cgdb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_cgdb(o->out, cpu_env, o->in2, m34); + gen_helper_cgdb(o->out, tcg_env, o->in2, m34); set_cc_static(s); return DISAS_NEXT; } @@ -1845,7 +1845,7 @@ static DisasJumpType op_cgxb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_cgxb(o->out, cpu_env, o->in2_128, m34); + gen_helper_cgxb(o->out, tcg_env, o->in2_128, m34); set_cc_static(s); return DISAS_NEXT; } @@ -1857,7 +1857,7 @@ static DisasJumpType op_clfeb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_clfeb(o->out, cpu_env, o->in2, m34); + gen_helper_clfeb(o->out, tcg_env, o->in2, m34); set_cc_static(s); return DISAS_NEXT; } @@ -1869,7 +1869,7 @@ static DisasJumpType op_clfdb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_clfdb(o->out, cpu_env, o->in2, m34); + gen_helper_clfdb(o->out, tcg_env, o->in2, m34); set_cc_static(s); return DISAS_NEXT; } @@ -1881,7 +1881,7 @@ static DisasJumpType op_clfxb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_clfxb(o->out, cpu_env, o->in2_128, m34); + gen_helper_clfxb(o->out, tcg_env, o->in2_128, m34); set_cc_static(s); return DISAS_NEXT; } @@ -1893,7 +1893,7 @@ static DisasJumpType op_clgeb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_clgeb(o->out, cpu_env, o->in2, m34); + gen_helper_clgeb(o->out, tcg_env, o->in2, m34); set_cc_static(s); return DISAS_NEXT; } @@ -1905,7 +1905,7 @@ static DisasJumpType op_clgdb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_clgdb(o->out, cpu_env, o->in2, m34); + gen_helper_clgdb(o->out, tcg_env, o->in2, m34); set_cc_static(s); return DISAS_NEXT; } @@ -1917,7 +1917,7 @@ static DisasJumpType op_clgxb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_clgxb(o->out, cpu_env, o->in2_128, m34); + gen_helper_clgxb(o->out, tcg_env, o->in2_128, m34); set_cc_static(s); return DISAS_NEXT; } @@ -1929,7 +1929,7 @@ static DisasJumpType op_cegb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_cegb(o->out, cpu_env, o->in2, m34); + gen_helper_cegb(o->out, tcg_env, o->in2, m34); return DISAS_NEXT; } @@ -1940,7 +1940,7 @@ static DisasJumpType op_cdgb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_cdgb(o->out, cpu_env, o->in2, m34); + gen_helper_cdgb(o->out, tcg_env, o->in2, m34); return DISAS_NEXT; } @@ -1951,7 +1951,7 @@ static DisasJumpType op_cxgb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_cxgb(o->out_128, cpu_env, o->in2, m34); + gen_helper_cxgb(o->out_128, tcg_env, o->in2, m34); return DISAS_NEXT; } @@ -1962,7 +1962,7 @@ static DisasJumpType op_celgb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_celgb(o->out, cpu_env, o->in2, m34); + gen_helper_celgb(o->out, tcg_env, o->in2, m34); return DISAS_NEXT; } @@ -1973,7 +1973,7 @@ static DisasJumpType op_cdlgb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_cdlgb(o->out, cpu_env, o->in2, m34); + gen_helper_cdlgb(o->out, tcg_env, o->in2, m34); return DISAS_NEXT; } @@ -1984,7 +1984,7 @@ static DisasJumpType op_cxlgb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_cxlgb(o->out_128, cpu_env, o->in2, m34); + gen_helper_cxlgb(o->out_128, tcg_env, o->in2, m34); return DISAS_NEXT; } @@ -1994,7 +1994,7 @@ static DisasJumpType op_cksm(DisasContext *s, DisasOps *o) TCGv_i128 pair = tcg_temp_new_i128(); TCGv_i64 len = tcg_temp_new_i64(); - gen_helper_cksm(pair, cpu_env, o->in1, o->in2, regs[r2 + 1]); + gen_helper_cksm(pair, tcg_env, o->in1, o->in2, regs[r2 + 1]); set_cc_static(s); tcg_gen_extr_i128_i64(o->out, len, pair); @@ -2022,7 +2022,7 @@ static DisasJumpType op_clc(DisasContext *s, DisasOps *o) return DISAS_NEXT; default: vl = tcg_constant_i32(l); - gen_helper_clc(cc_op, cpu_env, vl, o->addr1, o->in2); + gen_helper_clc(cc_op, tcg_env, vl, o->addr1, o->in2); set_cc_static(s); return DISAS_NEXT; } @@ -2042,7 +2042,7 @@ static DisasJumpType op_clcl(DisasContext *s, DisasOps *o) t1 = tcg_constant_i32(r1); t2 = tcg_constant_i32(r2); - gen_helper_clcl(cc_op, cpu_env, t1, t2); + gen_helper_clcl(cc_op, tcg_env, t1, t2); set_cc_static(s); return DISAS_NEXT; } @@ -2061,7 +2061,7 @@ static DisasJumpType op_clcle(DisasContext *s, DisasOps *o) t1 = tcg_constant_i32(r1); t3 = tcg_constant_i32(r3); - gen_helper_clcle(cc_op, cpu_env, t1, o->in2, t3); + gen_helper_clcle(cc_op, tcg_env, t1, o->in2, t3); set_cc_static(s); return DISAS_NEXT; } @@ -2080,7 +2080,7 @@ static DisasJumpType op_clclu(DisasContext *s, DisasOps *o) t1 = tcg_constant_i32(r1); t3 = tcg_constant_i32(r3); - gen_helper_clclu(cc_op, cpu_env, t1, o->in2, t3); + gen_helper_clclu(cc_op, tcg_env, t1, o->in2, t3); set_cc_static(s); return DISAS_NEXT; } @@ -2091,7 +2091,7 @@ static DisasJumpType op_clm(DisasContext *s, DisasOps *o) TCGv_i32 t1 = tcg_temp_new_i32(); tcg_gen_extrl_i64_i32(t1, o->in1); - gen_helper_clm(cc_op, cpu_env, t1, m3, o->in2); + gen_helper_clm(cc_op, tcg_env, t1, m3, o->in2); set_cc_static(s); return DISAS_NEXT; } @@ -2100,7 +2100,7 @@ static DisasJumpType op_clst(DisasContext *s, DisasOps *o) { TCGv_i128 pair = tcg_temp_new_i128(); - gen_helper_clst(pair, cpu_env, regs[0], o->in1, o->in2); + gen_helper_clst(pair, tcg_env, regs[0], o->in1, o->in2); tcg_gen_extr_i128_i64(o->in2, o->in1, pair); set_cc_static(s); @@ -2169,9 +2169,9 @@ static DisasJumpType op_csst(DisasContext *s, DisasOps *o) TCGv_i32 t_r3 = tcg_constant_i32(r3); if (tb_cflags(s->base.tb) & CF_PARALLEL) { - gen_helper_csst_parallel(cc_op, cpu_env, t_r3, o->addr1, o->in2); + gen_helper_csst_parallel(cc_op, tcg_env, t_r3, o->addr1, o->in2); } else { - gen_helper_csst(cc_op, cpu_env, t_r3, o->addr1, o->in2); + gen_helper_csst(cc_op, tcg_env, t_r3, o->addr1, o->in2); } set_cc_static(s); @@ -2213,7 +2213,7 @@ static DisasJumpType op_csp(DisasContext *s, DisasOps *o) tcg_gen_and_i64(cc, cc, o->in2); tcg_gen_brcondi_i64(TCG_COND_EQ, cc, 0, lab); - gen_helper_purge(cpu_env); + gen_helper_purge(tcg_env); gen_set_label(lab); return DISAS_NEXT; @@ -2271,22 +2271,22 @@ static DisasJumpType op_cuXX(DisasContext *s, DisasOps *o) switch (s->insn->data) { case 12: - gen_helper_cu12(cc_op, cpu_env, tr1, tr2, chk); + gen_helper_cu12(cc_op, tcg_env, tr1, tr2, chk); break; case 14: - gen_helper_cu14(cc_op, cpu_env, tr1, tr2, chk); + gen_helper_cu14(cc_op, tcg_env, tr1, tr2, chk); break; case 21: - gen_helper_cu21(cc_op, cpu_env, tr1, tr2, chk); + gen_helper_cu21(cc_op, tcg_env, tr1, tr2, chk); break; case 24: - gen_helper_cu24(cc_op, cpu_env, tr1, tr2, chk); + gen_helper_cu24(cc_op, tcg_env, tr1, tr2, chk); break; case 41: - gen_helper_cu41(cc_op, cpu_env, tr1, tr2, chk); + gen_helper_cu41(cc_op, tcg_env, tr1, tr2, chk); break; case 42: - gen_helper_cu42(cc_op, cpu_env, tr1, tr2, chk); + gen_helper_cu42(cc_op, tcg_env, tr1, tr2, chk); break; default: g_assert_not_reached(); @@ -2303,21 +2303,21 @@ static DisasJumpType op_diag(DisasContext *s, DisasOps *o) TCGv_i32 r3 = tcg_constant_i32(get_field(s, r3)); TCGv_i32 func_code = tcg_constant_i32(get_field(s, i2)); - gen_helper_diag(cpu_env, r1, r3, func_code); + gen_helper_diag(tcg_env, r1, r3, func_code); return DISAS_NEXT; } #endif static DisasJumpType op_divs32(DisasContext *s, DisasOps *o) { - gen_helper_divs32(o->out, cpu_env, o->in1, o->in2); + gen_helper_divs32(o->out, tcg_env, o->in1, o->in2); tcg_gen_extr32_i64(o->out2, o->out, o->out); return DISAS_NEXT; } static DisasJumpType op_divu32(DisasContext *s, DisasOps *o) { - gen_helper_divu32(o->out, cpu_env, o->in1, o->in2); + gen_helper_divu32(o->out, tcg_env, o->in1, o->in2); tcg_gen_extr32_i64(o->out2, o->out, o->out); return DISAS_NEXT; } @@ -2326,7 +2326,7 @@ static DisasJumpType op_divs64(DisasContext *s, DisasOps *o) { TCGv_i128 t = tcg_temp_new_i128(); - gen_helper_divs64(t, cpu_env, o->in1, o->in2); + gen_helper_divs64(t, tcg_env, o->in1, o->in2); tcg_gen_extr_i128_i64(o->out2, o->out, t); return DISAS_NEXT; } @@ -2335,33 +2335,33 @@ static DisasJumpType op_divu64(DisasContext *s, DisasOps *o) { TCGv_i128 t = tcg_temp_new_i128(); - gen_helper_divu64(t, cpu_env, o->out, o->out2, o->in2); + gen_helper_divu64(t, tcg_env, o->out, o->out2, o->in2); tcg_gen_extr_i128_i64(o->out2, o->out, t); return DISAS_NEXT; } static DisasJumpType op_deb(DisasContext *s, DisasOps *o) { - gen_helper_deb(o->out, cpu_env, o->in1, o->in2); + gen_helper_deb(o->out, tcg_env, o->in1, o->in2); return DISAS_NEXT; } static DisasJumpType op_ddb(DisasContext *s, DisasOps *o) { - gen_helper_ddb(o->out, cpu_env, o->in1, o->in2); + gen_helper_ddb(o->out, tcg_env, o->in1, o->in2); return DISAS_NEXT; } static DisasJumpType op_dxb(DisasContext *s, DisasOps *o) { - gen_helper_dxb(o->out_128, cpu_env, o->in1_128, o->in2_128); + gen_helper_dxb(o->out_128, tcg_env, o->in1_128, o->in2_128); return DISAS_NEXT; } static DisasJumpType op_ear(DisasContext *s, DisasOps *o) { int r2 = get_field(s, r2); - tcg_gen_ld32u_i64(o->out, cpu_env, offsetof(CPUS390XState, aregs[r2])); + tcg_gen_ld32u_i64(o->out, tcg_env, offsetof(CPUS390XState, aregs[r2])); return DISAS_NEXT; } @@ -2374,7 +2374,7 @@ static DisasJumpType op_ecag(DisasContext *s, DisasOps *o) static DisasJumpType op_efpc(DisasContext *s, DisasOps *o) { - tcg_gen_ld32u_i64(o->out, cpu_env, offsetof(CPUS390XState, fpc)); + tcg_gen_ld32u_i64(o->out, tcg_env, offsetof(CPUS390XState, fpc)); return DISAS_NEXT; } @@ -2420,7 +2420,7 @@ static DisasJumpType op_ex(DisasContext *s, DisasOps *o) } ilen = tcg_constant_i32(s->ilen); - gen_helper_ex(cpu_env, ilen, v1, o->in2); + gen_helper_ex(tcg_env, ilen, v1, o->in2); return DISAS_PC_CC_UPDATED; } @@ -2432,7 +2432,7 @@ static DisasJumpType op_fieb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_fieb(o->out, cpu_env, o->in2, m34); + gen_helper_fieb(o->out, tcg_env, o->in2, m34); return DISAS_NEXT; } @@ -2443,7 +2443,7 @@ static DisasJumpType op_fidb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_fidb(o->out, cpu_env, o->in2, m34); + gen_helper_fidb(o->out, tcg_env, o->in2, m34); return DISAS_NEXT; } @@ -2454,7 +2454,7 @@ static DisasJumpType op_fixb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_fixb(o->out_128, cpu_env, o->in2_128, m34); + gen_helper_fixb(o->out_128, tcg_env, o->in2_128, m34); return DISAS_NEXT; } @@ -2575,7 +2575,7 @@ static DisasJumpType op_idte(DisasContext *s, DisasOps *o) } else { m4 = tcg_constant_i32(0); } - gen_helper_idte(cpu_env, o->in1, o->in2, m4); + gen_helper_idte(tcg_env, o->in1, o->in2, m4); return DISAS_NEXT; } @@ -2588,13 +2588,13 @@ static DisasJumpType op_ipte(DisasContext *s, DisasOps *o) } else { m4 = tcg_constant_i32(0); } - gen_helper_ipte(cpu_env, o->in1, o->in2, m4); + gen_helper_ipte(tcg_env, o->in1, o->in2, m4); return DISAS_NEXT; } static DisasJumpType op_iske(DisasContext *s, DisasOps *o) { - gen_helper_iske(o->out, cpu_env, o->in2); + gen_helper_iske(o->out, tcg_env, o->in2); return DISAS_NEXT; } #endif @@ -2648,28 +2648,28 @@ static DisasJumpType op_msa(DisasContext *s, DisasOps *o) t_r2 = tcg_constant_i32(r2); t_r3 = tcg_constant_i32(r3); type = tcg_constant_i32(s->insn->data); - gen_helper_msa(cc_op, cpu_env, t_r1, t_r2, t_r3, type); + gen_helper_msa(cc_op, tcg_env, t_r1, t_r2, t_r3, type); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_keb(DisasContext *s, DisasOps *o) { - gen_helper_keb(cc_op, cpu_env, o->in1, o->in2); + gen_helper_keb(cc_op, tcg_env, o->in1, o->in2); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_kdb(DisasContext *s, DisasOps *o) { - gen_helper_kdb(cc_op, cpu_env, o->in1, o->in2); + gen_helper_kdb(cc_op, tcg_env, o->in1, o->in2); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_kxb(DisasContext *s, DisasOps *o) { - gen_helper_kxb(cc_op, cpu_env, o->in1_128, o->in2_128); + gen_helper_kxb(cc_op, tcg_env, o->in1_128, o->in2_128); set_cc_static(s); return DISAS_NEXT; } @@ -2720,7 +2720,7 @@ static DisasJumpType op_lax(DisasContext *s, DisasOps *o) static DisasJumpType op_ldeb(DisasContext *s, DisasOps *o) { - gen_helper_ldeb(o->out, cpu_env, o->in2); + gen_helper_ldeb(o->out, tcg_env, o->in2); return DISAS_NEXT; } @@ -2731,7 +2731,7 @@ static DisasJumpType op_ledb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_ledb(o->out, cpu_env, o->in2, m34); + gen_helper_ledb(o->out, tcg_env, o->in2, m34); return DISAS_NEXT; } @@ -2742,7 +2742,7 @@ static DisasJumpType op_ldxb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_ldxb(o->out, cpu_env, o->in2_128, m34); + gen_helper_ldxb(o->out, tcg_env, o->in2_128, m34); return DISAS_NEXT; } @@ -2753,19 +2753,19 @@ static DisasJumpType op_lexb(DisasContext *s, DisasOps *o) if (!m34) { return DISAS_NORETURN; } - gen_helper_lexb(o->out, cpu_env, o->in2_128, m34); + gen_helper_lexb(o->out, tcg_env, o->in2_128, m34); return DISAS_NEXT; } static DisasJumpType op_lxdb(DisasContext *s, DisasOps *o) { - gen_helper_lxdb(o->out_128, cpu_env, o->in2); + gen_helper_lxdb(o->out_128, tcg_env, o->in2); return DISAS_NEXT; } static DisasJumpType op_lxeb(DisasContext *s, DisasOps *o) { - gen_helper_lxeb(o->out_128, cpu_env, o->in2); + gen_helper_lxeb(o->out_128, tcg_env, o->in2); return DISAS_NEXT; } @@ -2919,7 +2919,7 @@ static DisasJumpType op_lctl(DisasContext *s, DisasOps *o) TCGv_i32 r1 = tcg_constant_i32(get_field(s, r1)); TCGv_i32 r3 = tcg_constant_i32(get_field(s, r3)); - gen_helper_lctl(cpu_env, r1, o->in2, r3); + gen_helper_lctl(tcg_env, r1, o->in2, r3); /* Exit to main loop to reevaluate s390_cpu_exec_interrupt. */ s->exit_to_mainloop = true; return DISAS_TOO_MANY; @@ -2930,7 +2930,7 @@ static DisasJumpType op_lctlg(DisasContext *s, DisasOps *o) TCGv_i32 r1 = tcg_constant_i32(get_field(s, r1)); TCGv_i32 r3 = tcg_constant_i32(get_field(s, r3)); - gen_helper_lctlg(cpu_env, r1, o->in2, r3); + gen_helper_lctlg(tcg_env, r1, o->in2, r3); /* Exit to main loop to reevaluate s390_cpu_exec_interrupt. */ s->exit_to_mainloop = true; return DISAS_TOO_MANY; @@ -2938,14 +2938,14 @@ static DisasJumpType op_lctlg(DisasContext *s, DisasOps *o) static DisasJumpType op_lra(DisasContext *s, DisasOps *o) { - gen_helper_lra(o->out, cpu_env, o->out, o->in2); + gen_helper_lra(o->out, tcg_env, o->out, o->in2); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_lpp(DisasContext *s, DisasOps *o) { - tcg_gen_st_i64(o->in2, cpu_env, offsetof(CPUS390XState, pp)); + tcg_gen_st_i64(o->in2, tcg_env, offsetof(CPUS390XState, pp)); return DISAS_NEXT; } @@ -2965,7 +2965,7 @@ static DisasJumpType op_lpsw(DisasContext *s, DisasOps *o) tcg_gen_andi_i64(addr, mask, PSW_MASK_SHORT_ADDR); tcg_gen_andi_i64(mask, mask, PSW_MASK_SHORT_CTRL); tcg_gen_xori_i64(mask, mask, PSW_MASK_SHORTPSW); - gen_helper_load_psw(cpu_env, mask, addr); + gen_helper_load_psw(tcg_env, mask, addr); return DISAS_NORETURN; } @@ -2981,7 +2981,7 @@ static DisasJumpType op_lpswe(DisasContext *s, DisasOps *o) MO_TEUQ | MO_ALIGN_8); tcg_gen_addi_i64(o->in2, o->in2, 8); tcg_gen_qemu_ld_i64(t2, o->in2, get_mem_index(s), MO_TEUQ); - gen_helper_load_psw(cpu_env, t1, t2); + gen_helper_load_psw(tcg_env, t1, t2); return DISAS_NORETURN; } #endif @@ -2991,7 +2991,7 @@ static DisasJumpType op_lam(DisasContext *s, DisasOps *o) TCGv_i32 r1 = tcg_constant_i32(get_field(s, r1)); TCGv_i32 r3 = tcg_constant_i32(get_field(s, r3)); - gen_helper_lam(cpu_env, r1, o->in2, r3); + gen_helper_lam(tcg_env, r1, o->in2, r3); return DISAS_NEXT; } @@ -3185,7 +3185,7 @@ static DisasJumpType op_mc(DisasContext *s, DisasOps *o) } #if !defined(CONFIG_USER_ONLY) - gen_helper_monitor_call(cpu_env, o->addr1, + gen_helper_monitor_call(tcg_env, o->addr1, tcg_constant_i32(monitor_class)); #endif /* Defaults to a NOP. */ @@ -3216,7 +3216,7 @@ static DisasJumpType op_mov2e(DisasContext *s, DisasOps *o) break; case PSW_ASC_SECONDARY >> FLAG_MASK_PSW_SHIFT: if (b2) { - tcg_gen_ld32u_i64(ar1, cpu_env, offsetof(CPUS390XState, aregs[b2])); + tcg_gen_ld32u_i64(ar1, tcg_env, offsetof(CPUS390XState, aregs[b2])); } else { tcg_gen_movi_i64(ar1, 0); } @@ -3226,7 +3226,7 @@ static DisasJumpType op_mov2e(DisasContext *s, DisasOps *o) break; } - tcg_gen_st32_i64(ar1, cpu_env, offsetof(CPUS390XState, aregs[1])); + tcg_gen_st32_i64(ar1, tcg_env, offsetof(CPUS390XState, aregs[1])); return DISAS_NEXT; } @@ -3243,13 +3243,13 @@ static DisasJumpType op_mvc(DisasContext *s, DisasOps *o) { TCGv_i32 l = tcg_constant_i32(get_field(s, l1)); - gen_helper_mvc(cpu_env, l, o->addr1, o->in2); + gen_helper_mvc(tcg_env, l, o->addr1, o->in2); return DISAS_NEXT; } static DisasJumpType op_mvcrl(DisasContext *s, DisasOps *o) { - gen_helper_mvcrl(cpu_env, regs[0], o->addr1, o->in2); + gen_helper_mvcrl(tcg_env, regs[0], o->addr1, o->in2); return DISAS_NEXT; } @@ -3257,7 +3257,7 @@ static DisasJumpType op_mvcin(DisasContext *s, DisasOps *o) { TCGv_i32 l = tcg_constant_i32(get_field(s, l1)); - gen_helper_mvcin(cpu_env, l, o->addr1, o->in2); + gen_helper_mvcin(tcg_env, l, o->addr1, o->in2); return DISAS_NEXT; } @@ -3275,7 +3275,7 @@ static DisasJumpType op_mvcl(DisasContext *s, DisasOps *o) t1 = tcg_constant_i32(r1); t2 = tcg_constant_i32(r2); - gen_helper_mvcl(cc_op, cpu_env, t1, t2); + gen_helper_mvcl(cc_op, tcg_env, t1, t2); set_cc_static(s); return DISAS_NEXT; } @@ -3294,7 +3294,7 @@ static DisasJumpType op_mvcle(DisasContext *s, DisasOps *o) t1 = tcg_constant_i32(r1); t3 = tcg_constant_i32(r3); - gen_helper_mvcle(cc_op, cpu_env, t1, o->in2, t3); + gen_helper_mvcle(cc_op, tcg_env, t1, o->in2, t3); set_cc_static(s); return DISAS_NEXT; } @@ -3313,7 +3313,7 @@ static DisasJumpType op_mvclu(DisasContext *s, DisasOps *o) t1 = tcg_constant_i32(r1); t3 = tcg_constant_i32(r3); - gen_helper_mvclu(cc_op, cpu_env, t1, o->in2, t3); + gen_helper_mvclu(cc_op, tcg_env, t1, o->in2, t3); set_cc_static(s); return DISAS_NEXT; } @@ -3321,7 +3321,7 @@ static DisasJumpType op_mvclu(DisasContext *s, DisasOps *o) static DisasJumpType op_mvcos(DisasContext *s, DisasOps *o) { int r3 = get_field(s, r3); - gen_helper_mvcos(cc_op, cpu_env, o->addr1, o->in2, regs[r3]); + gen_helper_mvcos(cc_op, tcg_env, o->addr1, o->in2, regs[r3]); set_cc_static(s); return DISAS_NEXT; } @@ -3331,7 +3331,7 @@ static DisasJumpType op_mvcp(DisasContext *s, DisasOps *o) { int r1 = get_field(s, l1); int r3 = get_field(s, r3); - gen_helper_mvcp(cc_op, cpu_env, regs[r1], o->addr1, o->in2, regs[r3]); + gen_helper_mvcp(cc_op, tcg_env, regs[r1], o->addr1, o->in2, regs[r3]); set_cc_static(s); return DISAS_NEXT; } @@ -3340,7 +3340,7 @@ static DisasJumpType op_mvcs(DisasContext *s, DisasOps *o) { int r1 = get_field(s, l1); int r3 = get_field(s, r3); - gen_helper_mvcs(cc_op, cpu_env, regs[r1], o->addr1, o->in2, regs[r3]); + gen_helper_mvcs(cc_op, tcg_env, regs[r1], o->addr1, o->in2, regs[r3]); set_cc_static(s); return DISAS_NEXT; } @@ -3350,7 +3350,7 @@ static DisasJumpType op_mvn(DisasContext *s, DisasOps *o) { TCGv_i32 l = tcg_constant_i32(get_field(s, l1)); - gen_helper_mvn(cpu_env, l, o->addr1, o->in2); + gen_helper_mvn(tcg_env, l, o->addr1, o->in2); return DISAS_NEXT; } @@ -3358,7 +3358,7 @@ static DisasJumpType op_mvo(DisasContext *s, DisasOps *o) { TCGv_i32 l = tcg_constant_i32(get_field(s, l1)); - gen_helper_mvo(cpu_env, l, o->addr1, o->in2); + gen_helper_mvo(tcg_env, l, o->addr1, o->in2); return DISAS_NEXT; } @@ -3367,7 +3367,7 @@ static DisasJumpType op_mvpg(DisasContext *s, DisasOps *o) TCGv_i32 t1 = tcg_constant_i32(get_field(s, r1)); TCGv_i32 t2 = tcg_constant_i32(get_field(s, r2)); - gen_helper_mvpg(cc_op, cpu_env, regs[0], t1, t2); + gen_helper_mvpg(cc_op, tcg_env, regs[0], t1, t2); set_cc_static(s); return DISAS_NEXT; } @@ -3377,7 +3377,7 @@ static DisasJumpType op_mvst(DisasContext *s, DisasOps *o) TCGv_i32 t1 = tcg_constant_i32(get_field(s, r1)); TCGv_i32 t2 = tcg_constant_i32(get_field(s, r2)); - gen_helper_mvst(cc_op, cpu_env, t1, t2); + gen_helper_mvst(cc_op, tcg_env, t1, t2); set_cc_static(s); return DISAS_NEXT; } @@ -3386,7 +3386,7 @@ static DisasJumpType op_mvz(DisasContext *s, DisasOps *o) { TCGv_i32 l = tcg_constant_i32(get_field(s, l1)); - gen_helper_mvz(cpu_env, l, o->addr1, o->in2); + gen_helper_mvz(tcg_env, l, o->addr1, o->in2); return DISAS_NEXT; } @@ -3410,59 +3410,59 @@ static DisasJumpType op_muls128(DisasContext *s, DisasOps *o) static DisasJumpType op_meeb(DisasContext *s, DisasOps *o) { - gen_helper_meeb(o->out, cpu_env, o->in1, o->in2); + gen_helper_meeb(o->out, tcg_env, o->in1, o->in2); return DISAS_NEXT; } static DisasJumpType op_mdeb(DisasContext *s, DisasOps *o) { - gen_helper_mdeb(o->out, cpu_env, o->in1, o->in2); + gen_helper_mdeb(o->out, tcg_env, o->in1, o->in2); return DISAS_NEXT; } static DisasJumpType op_mdb(DisasContext *s, DisasOps *o) { - gen_helper_mdb(o->out, cpu_env, o->in1, o->in2); + gen_helper_mdb(o->out, tcg_env, o->in1, o->in2); return DISAS_NEXT; } static DisasJumpType op_mxb(DisasContext *s, DisasOps *o) { - gen_helper_mxb(o->out_128, cpu_env, o->in1_128, o->in2_128); + gen_helper_mxb(o->out_128, tcg_env, o->in1_128, o->in2_128); return DISAS_NEXT; } static DisasJumpType op_mxdb(DisasContext *s, DisasOps *o) { - gen_helper_mxdb(o->out_128, cpu_env, o->in1, o->in2); + gen_helper_mxdb(o->out_128, tcg_env, o->in1, o->in2); return DISAS_NEXT; } static DisasJumpType op_maeb(DisasContext *s, DisasOps *o) { TCGv_i64 r3 = load_freg32_i64(get_field(s, r3)); - gen_helper_maeb(o->out, cpu_env, o->in1, o->in2, r3); + gen_helper_maeb(o->out, tcg_env, o->in1, o->in2, r3); return DISAS_NEXT; } static DisasJumpType op_madb(DisasContext *s, DisasOps *o) { TCGv_i64 r3 = load_freg(get_field(s, r3)); - gen_helper_madb(o->out, cpu_env, o->in1, o->in2, r3); + gen_helper_madb(o->out, tcg_env, o->in1, o->in2, r3); return DISAS_NEXT; } static DisasJumpType op_mseb(DisasContext *s, DisasOps *o) { TCGv_i64 r3 = load_freg32_i64(get_field(s, r3)); - gen_helper_mseb(o->out, cpu_env, o->in1, o->in2, r3); + gen_helper_mseb(o->out, tcg_env, o->in1, o->in2, r3); return DISAS_NEXT; } static DisasJumpType op_msdb(DisasContext *s, DisasOps *o) { TCGv_i64 r3 = load_freg(get_field(s, r3)); - gen_helper_msdb(o->out, cpu_env, o->in1, o->in2, r3); + gen_helper_msdb(o->out, tcg_env, o->in1, o->in2, r3); return DISAS_NEXT; } @@ -3499,7 +3499,7 @@ static DisasJumpType op_nc(DisasContext *s, DisasOps *o) { TCGv_i32 l = tcg_constant_i32(get_field(s, l1)); - gen_helper_nc(cc_op, cpu_env, l, o->addr1, o->in2); + gen_helper_nc(cc_op, tcg_env, l, o->addr1, o->in2); set_cc_static(s); return DISAS_NEXT; } @@ -3533,7 +3533,7 @@ static DisasJumpType op_oc(DisasContext *s, DisasOps *o) { TCGv_i32 l = tcg_constant_i32(get_field(s, l1)); - gen_helper_oc(cc_op, cpu_env, l, o->addr1, o->in2); + gen_helper_oc(cc_op, tcg_env, l, o->addr1, o->in2); set_cc_static(s); return DISAS_NEXT; } @@ -3585,7 +3585,7 @@ static DisasJumpType op_pack(DisasContext *s, DisasOps *o) { TCGv_i32 l = tcg_constant_i32(get_field(s, l1)); - gen_helper_pack(cpu_env, l, o->addr1, o->in2); + gen_helper_pack(tcg_env, l, o->addr1, o->in2); return DISAS_NEXT; } @@ -3600,7 +3600,7 @@ static DisasJumpType op_pka(DisasContext *s, DisasOps *o) return DISAS_NORETURN; } l = tcg_constant_i32(l2); - gen_helper_pka(cpu_env, o->addr1, o->in2, l); + gen_helper_pka(tcg_env, o->addr1, o->in2, l); return DISAS_NEXT; } @@ -3615,7 +3615,7 @@ static DisasJumpType op_pku(DisasContext *s, DisasOps *o) return DISAS_NORETURN; } l = tcg_constant_i32(l2); - gen_helper_pku(cpu_env, o->addr1, o->in2, l); + gen_helper_pku(tcg_env, o->addr1, o->in2, l); return DISAS_NEXT; } @@ -3634,7 +3634,7 @@ static DisasJumpType op_popcnt(DisasContext *s, DisasOps *o) #ifndef CONFIG_USER_ONLY static DisasJumpType op_ptlb(DisasContext *s, DisasOps *o) { - gen_helper_ptlb(cpu_env); + gen_helper_ptlb(tcg_env); return DISAS_NEXT; } #endif @@ -3822,14 +3822,14 @@ static DisasJumpType op_rll64(DisasContext *s, DisasOps *o) #ifndef CONFIG_USER_ONLY static DisasJumpType op_rrbe(DisasContext *s, DisasOps *o) { - gen_helper_rrbe(cc_op, cpu_env, o->in2); + gen_helper_rrbe(cc_op, tcg_env, o->in2); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_sacf(DisasContext *s, DisasOps *o) { - gen_helper_sacf(cpu_env, o->in2); + gen_helper_sacf(tcg_env, o->in2); /* Addressing mode has changed, so end the block. */ return DISAS_TOO_MANY; } @@ -3872,50 +3872,50 @@ static DisasJumpType op_sam(DisasContext *s, DisasOps *o) static DisasJumpType op_sar(DisasContext *s, DisasOps *o) { int r1 = get_field(s, r1); - tcg_gen_st32_i64(o->in2, cpu_env, offsetof(CPUS390XState, aregs[r1])); + tcg_gen_st32_i64(o->in2, tcg_env, offsetof(CPUS390XState, aregs[r1])); return DISAS_NEXT; } static DisasJumpType op_seb(DisasContext *s, DisasOps *o) { - gen_helper_seb(o->out, cpu_env, o->in1, o->in2); + gen_helper_seb(o->out, tcg_env, o->in1, o->in2); return DISAS_NEXT; } static DisasJumpType op_sdb(DisasContext *s, DisasOps *o) { - gen_helper_sdb(o->out, cpu_env, o->in1, o->in2); + gen_helper_sdb(o->out, tcg_env, o->in1, o->in2); return DISAS_NEXT; } static DisasJumpType op_sxb(DisasContext *s, DisasOps *o) { - gen_helper_sxb(o->out_128, cpu_env, o->in1_128, o->in2_128); + gen_helper_sxb(o->out_128, tcg_env, o->in1_128, o->in2_128); return DISAS_NEXT; } static DisasJumpType op_sqeb(DisasContext *s, DisasOps *o) { - gen_helper_sqeb(o->out, cpu_env, o->in2); + gen_helper_sqeb(o->out, tcg_env, o->in2); return DISAS_NEXT; } static DisasJumpType op_sqdb(DisasContext *s, DisasOps *o) { - gen_helper_sqdb(o->out, cpu_env, o->in2); + gen_helper_sqdb(o->out, tcg_env, o->in2); return DISAS_NEXT; } static DisasJumpType op_sqxb(DisasContext *s, DisasOps *o) { - gen_helper_sqxb(o->out_128, cpu_env, o->in2_128); + gen_helper_sqxb(o->out_128, tcg_env, o->in2_128); return DISAS_NEXT; } #ifndef CONFIG_USER_ONLY static DisasJumpType op_servc(DisasContext *s, DisasOps *o) { - gen_helper_servc(cc_op, cpu_env, o->in2, o->in1); + gen_helper_servc(cc_op, tcg_env, o->in2, o->in1); set_cc_static(s); return DISAS_NEXT; } @@ -3925,7 +3925,7 @@ static DisasJumpType op_sigp(DisasContext *s, DisasOps *o) TCGv_i32 r1 = tcg_constant_i32(get_field(s, r1)); TCGv_i32 r3 = tcg_constant_i32(get_field(s, r3)); - gen_helper_sigp(cc_op, cpu_env, o->in2, r1, r3); + gen_helper_sigp(cc_op, tcg_env, o->in2, r1, r3); set_cc_static(s); return DISAS_NEXT; } @@ -4013,13 +4013,13 @@ static DisasJumpType op_srl(DisasContext *s, DisasOps *o) static DisasJumpType op_sfpc(DisasContext *s, DisasOps *o) { - gen_helper_sfpc(cpu_env, o->in2); + gen_helper_sfpc(tcg_env, o->in2); return DISAS_NEXT; } static DisasJumpType op_sfas(DisasContext *s, DisasOps *o) { - gen_helper_sfas(cpu_env, o->in2); + gen_helper_sfas(tcg_env, o->in2); return DISAS_NEXT; } @@ -4027,7 +4027,7 @@ static DisasJumpType op_srnm(DisasContext *s, DisasOps *o) { /* Bits other than 62 and 63 are ignored. Bit 29 is set to zero. */ tcg_gen_andi_i64(o->addr1, o->addr1, 0x3ull); - gen_helper_srnm(cpu_env, o->addr1); + gen_helper_srnm(tcg_env, o->addr1); return DISAS_NEXT; } @@ -4035,7 +4035,7 @@ static DisasJumpType op_srnmb(DisasContext *s, DisasOps *o) { /* Bits 0-55 are are ignored. */ tcg_gen_andi_i64(o->addr1, o->addr1, 0xffull); - gen_helper_srnm(cpu_env, o->addr1); + gen_helper_srnm(tcg_env, o->addr1); return DISAS_NEXT; } @@ -4047,9 +4047,9 @@ static DisasJumpType op_srnmt(DisasContext *s, DisasOps *o) tcg_gen_andi_i64(o->addr1, o->addr1, 0x7ull); /* No need to call a helper, we don't implement dfp */ - tcg_gen_ld32u_i64(tmp, cpu_env, offsetof(CPUS390XState, fpc)); + tcg_gen_ld32u_i64(tmp, tcg_env, offsetof(CPUS390XState, fpc)); tcg_gen_deposit_i64(tmp, tmp, o->addr1, 4, 3); - tcg_gen_st32_i64(tmp, cpu_env, offsetof(CPUS390XState, fpc)); + tcg_gen_st32_i64(tmp, tcg_env, offsetof(CPUS390XState, fpc)); return DISAS_NEXT; } @@ -4085,7 +4085,7 @@ static DisasJumpType op_ectg(DisasContext *s, DisasOps *o) tcg_gen_qemu_ld_i64(regs[r3], o->addr1, get_mem_index(s), MO_TEUQ); /* subtract CPU timer from first operand and store in GR0 */ - gen_helper_stpt(tmp, cpu_env); + gen_helper_stpt(tmp, tcg_env); tcg_gen_sub_i64(regs[0], o->in1, tmp); /* store second operand in GR1 */ @@ -4103,7 +4103,7 @@ static DisasJumpType op_spka(DisasContext *s, DisasOps *o) static DisasJumpType op_sske(DisasContext *s, DisasOps *o) { - gen_helper_sske(cpu_env, o->in1, o->in2); + gen_helper_sske(tcg_env, o->in1, o->in2); return DISAS_NEXT; } @@ -4131,14 +4131,14 @@ static DisasJumpType op_ssm(DisasContext *s, DisasOps *o) static DisasJumpType op_stap(DisasContext *s, DisasOps *o) { - tcg_gen_ld32u_i64(o->out, cpu_env, offsetof(CPUS390XState, core_id)); + tcg_gen_ld32u_i64(o->out, tcg_env, offsetof(CPUS390XState, core_id)); return DISAS_NEXT; } #endif static DisasJumpType op_stck(DisasContext *s, DisasOps *o) { - gen_helper_stck(o->out, cpu_env); + gen_helper_stck(o->out, tcg_env); /* ??? We don't implement clock states. */ gen_op_movi_cc(s, 0); return DISAS_NEXT; @@ -4149,9 +4149,9 @@ static DisasJumpType op_stcke(DisasContext *s, DisasOps *o) TCGv_i64 c1 = tcg_temp_new_i64(); TCGv_i64 c2 = tcg_temp_new_i64(); TCGv_i64 todpr = tcg_temp_new_i64(); - gen_helper_stck(c1, cpu_env); + gen_helper_stck(c1, tcg_env); /* 16 bit value store in an uint32_t (only valid bits set) */ - tcg_gen_ld32u_i64(todpr, cpu_env, offsetof(CPUS390XState, todpr)); + tcg_gen_ld32u_i64(todpr, tcg_env, offsetof(CPUS390XState, todpr)); /* Shift the 64-bit value into its place as a zero-extended 104-bit value. Note that "bit positions 64-103 are always non-zero so that they compare differently to STCK"; we set @@ -4171,26 +4171,26 @@ static DisasJumpType op_stcke(DisasContext *s, DisasOps *o) #ifndef CONFIG_USER_ONLY static DisasJumpType op_sck(DisasContext *s, DisasOps *o) { - gen_helper_sck(cc_op, cpu_env, o->in2); + gen_helper_sck(cc_op, tcg_env, o->in2); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_sckc(DisasContext *s, DisasOps *o) { - gen_helper_sckc(cpu_env, o->in2); + gen_helper_sckc(tcg_env, o->in2); return DISAS_NEXT; } static DisasJumpType op_sckpf(DisasContext *s, DisasOps *o) { - gen_helper_sckpf(cpu_env, regs[0]); + gen_helper_sckpf(tcg_env, regs[0]); return DISAS_NEXT; } static DisasJumpType op_stckc(DisasContext *s, DisasOps *o) { - gen_helper_stckc(o->out, cpu_env); + gen_helper_stckc(o->out, tcg_env); return DISAS_NEXT; } @@ -4199,7 +4199,7 @@ static DisasJumpType op_stctg(DisasContext *s, DisasOps *o) TCGv_i32 r1 = tcg_constant_i32(get_field(s, r1)); TCGv_i32 r3 = tcg_constant_i32(get_field(s, r3)); - gen_helper_stctg(cpu_env, r1, o->in2, r3); + gen_helper_stctg(tcg_env, r1, o->in2, r3); return DISAS_NEXT; } @@ -4208,98 +4208,98 @@ static DisasJumpType op_stctl(DisasContext *s, DisasOps *o) TCGv_i32 r1 = tcg_constant_i32(get_field(s, r1)); TCGv_i32 r3 = tcg_constant_i32(get_field(s, r3)); - gen_helper_stctl(cpu_env, r1, o->in2, r3); + gen_helper_stctl(tcg_env, r1, o->in2, r3); return DISAS_NEXT; } static DisasJumpType op_stidp(DisasContext *s, DisasOps *o) { - tcg_gen_ld_i64(o->out, cpu_env, offsetof(CPUS390XState, cpuid)); + tcg_gen_ld_i64(o->out, tcg_env, offsetof(CPUS390XState, cpuid)); return DISAS_NEXT; } static DisasJumpType op_spt(DisasContext *s, DisasOps *o) { - gen_helper_spt(cpu_env, o->in2); + gen_helper_spt(tcg_env, o->in2); return DISAS_NEXT; } static DisasJumpType op_stfl(DisasContext *s, DisasOps *o) { - gen_helper_stfl(cpu_env); + gen_helper_stfl(tcg_env); return DISAS_NEXT; } static DisasJumpType op_stpt(DisasContext *s, DisasOps *o) { - gen_helper_stpt(o->out, cpu_env); + gen_helper_stpt(o->out, tcg_env); return DISAS_NEXT; } static DisasJumpType op_stsi(DisasContext *s, DisasOps *o) { - gen_helper_stsi(cc_op, cpu_env, o->in2, regs[0], regs[1]); + gen_helper_stsi(cc_op, tcg_env, o->in2, regs[0], regs[1]); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_spx(DisasContext *s, DisasOps *o) { - gen_helper_spx(cpu_env, o->in2); + gen_helper_spx(tcg_env, o->in2); return DISAS_NEXT; } static DisasJumpType op_xsch(DisasContext *s, DisasOps *o) { - gen_helper_xsch(cpu_env, regs[1]); + gen_helper_xsch(tcg_env, regs[1]); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_csch(DisasContext *s, DisasOps *o) { - gen_helper_csch(cpu_env, regs[1]); + gen_helper_csch(tcg_env, regs[1]); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_hsch(DisasContext *s, DisasOps *o) { - gen_helper_hsch(cpu_env, regs[1]); + gen_helper_hsch(tcg_env, regs[1]); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_msch(DisasContext *s, DisasOps *o) { - gen_helper_msch(cpu_env, regs[1], o->in2); + gen_helper_msch(tcg_env, regs[1], o->in2); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_rchp(DisasContext *s, DisasOps *o) { - gen_helper_rchp(cpu_env, regs[1]); + gen_helper_rchp(tcg_env, regs[1]); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_rsch(DisasContext *s, DisasOps *o) { - gen_helper_rsch(cpu_env, regs[1]); + gen_helper_rsch(tcg_env, regs[1]); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_sal(DisasContext *s, DisasOps *o) { - gen_helper_sal(cpu_env, regs[1]); + gen_helper_sal(tcg_env, regs[1]); return DISAS_NEXT; } static DisasJumpType op_schm(DisasContext *s, DisasOps *o) { - gen_helper_schm(cpu_env, regs[1], regs[2], o->in2); + gen_helper_schm(tcg_env, regs[1], regs[2], o->in2); return DISAS_NEXT; } @@ -4318,49 +4318,49 @@ static DisasJumpType op_stcps(DisasContext *s, DisasOps *o) static DisasJumpType op_ssch(DisasContext *s, DisasOps *o) { - gen_helper_ssch(cpu_env, regs[1], o->in2); + gen_helper_ssch(tcg_env, regs[1], o->in2); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_stsch(DisasContext *s, DisasOps *o) { - gen_helper_stsch(cpu_env, regs[1], o->in2); + gen_helper_stsch(tcg_env, regs[1], o->in2); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_stcrw(DisasContext *s, DisasOps *o) { - gen_helper_stcrw(cpu_env, o->in2); + gen_helper_stcrw(tcg_env, o->in2); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_tpi(DisasContext *s, DisasOps *o) { - gen_helper_tpi(cc_op, cpu_env, o->addr1); + gen_helper_tpi(cc_op, tcg_env, o->addr1); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_tsch(DisasContext *s, DisasOps *o) { - gen_helper_tsch(cpu_env, regs[1], o->in2); + gen_helper_tsch(tcg_env, regs[1], o->in2); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_chsc(DisasContext *s, DisasOps *o) { - gen_helper_chsc(cpu_env, o->in2); + gen_helper_chsc(tcg_env, o->in2); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_stpx(DisasContext *s, DisasOps *o) { - tcg_gen_ld_i64(o->out, cpu_env, offsetof(CPUS390XState, psa)); + tcg_gen_ld_i64(o->out, tcg_env, offsetof(CPUS390XState, psa)); tcg_gen_andi_i64(o->out, o->out, 0x7fffe000); return DISAS_NEXT; } @@ -4397,7 +4397,7 @@ static DisasJumpType op_stura(DisasContext *s, DisasOps *o) if (s->base.tb->flags & FLAG_MASK_PER) { update_psw_addr(s); - gen_helper_per_store_real(cpu_env); + gen_helper_per_store_real(tcg_env); } return DISAS_NEXT; } @@ -4405,7 +4405,7 @@ static DisasJumpType op_stura(DisasContext *s, DisasOps *o) static DisasJumpType op_stfle(DisasContext *s, DisasOps *o) { - gen_helper_stfle(cc_op, cpu_env, o->in2); + gen_helper_stfle(cc_op, tcg_env, o->in2); set_cc_static(s); return DISAS_NEXT; } @@ -4441,7 +4441,7 @@ static DisasJumpType op_stam(DisasContext *s, DisasOps *o) TCGv_i32 r1 = tcg_constant_i32(get_field(s, r1)); TCGv_i32 r3 = tcg_constant_i32(get_field(s, r3)); - gen_helper_stam(cpu_env, r1, o->in2, r3); + gen_helper_stam(tcg_env, r1, o->in2, r3); return DISAS_NEXT; } @@ -4548,7 +4548,7 @@ static DisasJumpType op_srst(DisasContext *s, DisasOps *o) TCGv_i32 r1 = tcg_constant_i32(get_field(s, r1)); TCGv_i32 r2 = tcg_constant_i32(get_field(s, r2)); - gen_helper_srst(cpu_env, r1, r2); + gen_helper_srst(tcg_env, r1, r2); set_cc_static(s); return DISAS_NEXT; } @@ -4558,7 +4558,7 @@ static DisasJumpType op_srstu(DisasContext *s, DisasOps *o) TCGv_i32 r1 = tcg_constant_i32(get_field(s, r1)); TCGv_i32 r2 = tcg_constant_i32(get_field(s, r2)); - gen_helper_srstu(cpu_env, r1, r2); + gen_helper_srstu(tcg_env, r1, r2); set_cc_static(s); return DISAS_NEXT; } @@ -4631,10 +4631,10 @@ static DisasJumpType op_svc(DisasContext *s, DisasOps *o) update_cc_op(s); t = tcg_constant_i32(get_field(s, i1) & 0xff); - tcg_gen_st_i32(t, cpu_env, offsetof(CPUS390XState, int_svc_code)); + tcg_gen_st_i32(t, tcg_env, offsetof(CPUS390XState, int_svc_code)); t = tcg_constant_i32(s->ilen); - tcg_gen_st_i32(t, cpu_env, offsetof(CPUS390XState, int_svc_ilen)); + tcg_gen_st_i32(t, tcg_env, offsetof(CPUS390XState, int_svc_ilen)); gen_exception(EXCP_SVC); return DISAS_NORETURN; @@ -4652,21 +4652,21 @@ static DisasJumpType op_tam(DisasContext *s, DisasOps *o) static DisasJumpType op_tceb(DisasContext *s, DisasOps *o) { - gen_helper_tceb(cc_op, cpu_env, o->in1, o->in2); + gen_helper_tceb(cc_op, tcg_env, o->in1, o->in2); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_tcdb(DisasContext *s, DisasOps *o) { - gen_helper_tcdb(cc_op, cpu_env, o->in1, o->in2); + gen_helper_tcdb(cc_op, tcg_env, o->in1, o->in2); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_tcxb(DisasContext *s, DisasOps *o) { - gen_helper_tcxb(cc_op, cpu_env, o->in1_128, o->in2); + gen_helper_tcxb(cc_op, tcg_env, o->in1_128, o->in2); set_cc_static(s); return DISAS_NEXT; } @@ -4675,14 +4675,14 @@ static DisasJumpType op_tcxb(DisasContext *s, DisasOps *o) static DisasJumpType op_testblock(DisasContext *s, DisasOps *o) { - gen_helper_testblock(cc_op, cpu_env, o->in2); + gen_helper_testblock(cc_op, tcg_env, o->in2); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_tprot(DisasContext *s, DisasOps *o) { - gen_helper_tprot(cc_op, cpu_env, o->addr1, o->in2); + gen_helper_tprot(cc_op, tcg_env, o->addr1, o->in2); set_cc_static(s); return DISAS_NEXT; } @@ -4693,7 +4693,7 @@ static DisasJumpType op_tp(DisasContext *s, DisasOps *o) { TCGv_i32 l1 = tcg_constant_i32(get_field(s, l1) + 1); - gen_helper_tp(cc_op, cpu_env, o->addr1, l1); + gen_helper_tp(cc_op, tcg_env, o->addr1, l1); set_cc_static(s); return DISAS_NEXT; } @@ -4702,7 +4702,7 @@ static DisasJumpType op_tr(DisasContext *s, DisasOps *o) { TCGv_i32 l = tcg_constant_i32(get_field(s, l1)); - gen_helper_tr(cpu_env, l, o->addr1, o->in2); + gen_helper_tr(tcg_env, l, o->addr1, o->in2); set_cc_static(s); return DISAS_NEXT; } @@ -4711,7 +4711,7 @@ static DisasJumpType op_tre(DisasContext *s, DisasOps *o) { TCGv_i128 pair = tcg_temp_new_i128(); - gen_helper_tre(pair, cpu_env, o->out, o->out2, o->in2); + gen_helper_tre(pair, tcg_env, o->out, o->out2, o->in2); tcg_gen_extr_i128_i64(o->out2, o->out, pair); set_cc_static(s); return DISAS_NEXT; @@ -4721,7 +4721,7 @@ static DisasJumpType op_trt(DisasContext *s, DisasOps *o) { TCGv_i32 l = tcg_constant_i32(get_field(s, l1)); - gen_helper_trt(cc_op, cpu_env, l, o->addr1, o->in2); + gen_helper_trt(cc_op, tcg_env, l, o->addr1, o->in2); set_cc_static(s); return DISAS_NEXT; } @@ -4730,7 +4730,7 @@ static DisasJumpType op_trtr(DisasContext *s, DisasOps *o) { TCGv_i32 l = tcg_constant_i32(get_field(s, l1)); - gen_helper_trtr(cc_op, cpu_env, l, o->addr1, o->in2); + gen_helper_trtr(cc_op, tcg_env, l, o->addr1, o->in2); set_cc_static(s); return DISAS_NEXT; } @@ -4756,7 +4756,7 @@ static DisasJumpType op_trXX(DisasContext *s, DisasOps *o) tcg_gen_ext16u_i32(tst, tst); } } - gen_helper_trXX(cc_op, cpu_env, r1, r2, tst, sizes); + gen_helper_trXX(cc_op, tcg_env, r1, r2, tst, sizes); set_cc_static(s); return DISAS_NEXT; @@ -4776,7 +4776,7 @@ static DisasJumpType op_unpk(DisasContext *s, DisasOps *o) { TCGv_i32 l = tcg_constant_i32(get_field(s, l1)); - gen_helper_unpk(cpu_env, l, o->addr1, o->in2); + gen_helper_unpk(tcg_env, l, o->addr1, o->in2); return DISAS_NEXT; } @@ -4791,7 +4791,7 @@ static DisasJumpType op_unpka(DisasContext *s, DisasOps *o) return DISAS_NORETURN; } l = tcg_constant_i32(l1); - gen_helper_unpka(cc_op, cpu_env, o->addr1, l, o->in2); + gen_helper_unpka(cc_op, tcg_env, o->addr1, l, o->in2); set_cc_static(s); return DISAS_NEXT; } @@ -4807,7 +4807,7 @@ static DisasJumpType op_unpku(DisasContext *s, DisasOps *o) return DISAS_NORETURN; } l = tcg_constant_i32(l1); - gen_helper_unpku(cc_op, cpu_env, o->addr1, l, o->in2); + gen_helper_unpku(cc_op, tcg_env, o->addr1, l, o->in2); set_cc_static(s); return DISAS_NEXT; } @@ -4860,7 +4860,7 @@ static DisasJumpType op_xc(DisasContext *s, DisasOps *o) /* But in general we'll defer to a helper. */ o->in2 = get_address(s, 0, b2, d2); t32 = tcg_constant_i32(l); - gen_helper_xc(cc_op, cpu_env, t32, o->addr1, o->in2); + gen_helper_xc(cc_op, tcg_env, t32, o->addr1, o->in2); set_cc_static(s); return DISAS_NEXT; } @@ -4926,7 +4926,7 @@ static DisasJumpType op_clp(DisasContext *s, DisasOps *o) { TCGv_i32 r2 = tcg_constant_i32(get_field(s, r2)); - gen_helper_clp(cpu_env, r2); + gen_helper_clp(tcg_env, r2); set_cc_static(s); return DISAS_NEXT; } @@ -4936,7 +4936,7 @@ static DisasJumpType op_pcilg(DisasContext *s, DisasOps *o) TCGv_i32 r1 = tcg_constant_i32(get_field(s, r1)); TCGv_i32 r2 = tcg_constant_i32(get_field(s, r2)); - gen_helper_pcilg(cpu_env, r1, r2); + gen_helper_pcilg(tcg_env, r1, r2); set_cc_static(s); return DISAS_NEXT; } @@ -4946,7 +4946,7 @@ static DisasJumpType op_pcistg(DisasContext *s, DisasOps *o) TCGv_i32 r1 = tcg_constant_i32(get_field(s, r1)); TCGv_i32 r2 = tcg_constant_i32(get_field(s, r2)); - gen_helper_pcistg(cpu_env, r1, r2); + gen_helper_pcistg(tcg_env, r1, r2); set_cc_static(s); return DISAS_NEXT; } @@ -4956,14 +4956,14 @@ static DisasJumpType op_stpcifc(DisasContext *s, DisasOps *o) TCGv_i32 r1 = tcg_constant_i32(get_field(s, r1)); TCGv_i32 ar = tcg_constant_i32(get_field(s, b2)); - gen_helper_stpcifc(cpu_env, r1, o->addr1, ar); + gen_helper_stpcifc(tcg_env, r1, o->addr1, ar); set_cc_static(s); return DISAS_NEXT; } static DisasJumpType op_sic(DisasContext *s, DisasOps *o) { - gen_helper_sic(cpu_env, o->in1, o->in2); + gen_helper_sic(tcg_env, o->in1, o->in2); return DISAS_NEXT; } @@ -4972,7 +4972,7 @@ static DisasJumpType op_rpcit(DisasContext *s, DisasOps *o) TCGv_i32 r1 = tcg_constant_i32(get_field(s, r1)); TCGv_i32 r2 = tcg_constant_i32(get_field(s, r2)); - gen_helper_rpcit(cpu_env, r1, r2); + gen_helper_rpcit(tcg_env, r1, r2); set_cc_static(s); return DISAS_NEXT; } @@ -4983,7 +4983,7 @@ static DisasJumpType op_pcistb(DisasContext *s, DisasOps *o) TCGv_i32 r3 = tcg_constant_i32(get_field(s, r3)); TCGv_i32 ar = tcg_constant_i32(get_field(s, b2)); - gen_helper_pcistb(cpu_env, r1, r3, o->addr1, ar); + gen_helper_pcistb(tcg_env, r1, r3, o->addr1, ar); set_cc_static(s); return DISAS_NEXT; } @@ -4993,7 +4993,7 @@ static DisasJumpType op_mpcifc(DisasContext *s, DisasOps *o) TCGv_i32 r1 = tcg_constant_i32(get_field(s, r1)); TCGv_i32 ar = tcg_constant_i32(get_field(s, b2)); - gen_helper_mpcifc(cpu_env, r1, o->addr1, ar); + gen_helper_mpcifc(tcg_env, r1, o->addr1, ar); set_cc_static(s); return DISAS_NEXT; } @@ -6176,7 +6176,7 @@ static const DisasInsn *extract_insn(CPUS390XState *env, DisasContext *s) if (unlikely(s->ex_value)) { /* Drop the EX data now, so that it's clear on exception paths. */ - tcg_gen_st_i64(tcg_constant_i64(0), cpu_env, + tcg_gen_st_i64(tcg_constant_i64(0), tcg_env, offsetof(CPUS390XState, ex_value)); /* Extract the values saved by EXECUTE. */ @@ -6310,7 +6310,7 @@ static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s) #ifndef CONFIG_USER_ONLY if (s->base.tb->flags & FLAG_MASK_PER) { TCGv_i64 addr = tcg_constant_i64(s->base.pc_next); - gen_helper_per_ifetch(cpu_env, addr); + gen_helper_per_ifetch(tcg_env, addr); } #endif @@ -6415,7 +6415,7 @@ static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s) } /* Call the helper to check for a possible PER exception. */ - gen_helper_per_check_exception(cpu_env); + gen_helper_per_check_exception(tcg_env); } #endif diff --git a/target/s390x/tcg/translate_vx.c.inc b/target/s390x/tcg/translate_vx.c.inc index ec94d39df0..e073e5ad3a 100644 --- a/target/s390x/tcg/translate_vx.c.inc +++ b/target/s390x/tcg/translate_vx.c.inc @@ -36,7 +36,7 @@ * * CC handling: * As gvec ool-helpers can currently not return values (besides via - * pointers like vectors or cpu_env), whenever we have to set the CC and + * pointers like vectors or tcg_env), whenever we have to set the CC and * can't conclude the value from the result vector, we will directly * set it in "env->cc_op" and mark it as static via set_cc_static()". * Whenever this is done, the helper writes globals (cc_op). @@ -69,26 +69,26 @@ static void read_vec_element_i64(TCGv_i64 dst, uint8_t reg, uint8_t enr, switch ((unsigned)memop) { case ES_8: - tcg_gen_ld8u_i64(dst, cpu_env, offs); + tcg_gen_ld8u_i64(dst, tcg_env, offs); break; case ES_16: - tcg_gen_ld16u_i64(dst, cpu_env, offs); + tcg_gen_ld16u_i64(dst, tcg_env, offs); break; case ES_32: - tcg_gen_ld32u_i64(dst, cpu_env, offs); + tcg_gen_ld32u_i64(dst, tcg_env, offs); break; case ES_8 | MO_SIGN: - tcg_gen_ld8s_i64(dst, cpu_env, offs); + tcg_gen_ld8s_i64(dst, tcg_env, offs); break; case ES_16 | MO_SIGN: - tcg_gen_ld16s_i64(dst, cpu_env, offs); + tcg_gen_ld16s_i64(dst, tcg_env, offs); break; case ES_32 | MO_SIGN: - tcg_gen_ld32s_i64(dst, cpu_env, offs); + tcg_gen_ld32s_i64(dst, tcg_env, offs); break; case ES_64: case ES_64 | MO_SIGN: - tcg_gen_ld_i64(dst, cpu_env, offs); + tcg_gen_ld_i64(dst, tcg_env, offs); break; default: g_assert_not_reached(); @@ -102,20 +102,20 @@ static void read_vec_element_i32(TCGv_i32 dst, uint8_t reg, uint8_t enr, switch (memop) { case ES_8: - tcg_gen_ld8u_i32(dst, cpu_env, offs); + tcg_gen_ld8u_i32(dst, tcg_env, offs); break; case ES_16: - tcg_gen_ld16u_i32(dst, cpu_env, offs); + tcg_gen_ld16u_i32(dst, tcg_env, offs); break; case ES_8 | MO_SIGN: - tcg_gen_ld8s_i32(dst, cpu_env, offs); + tcg_gen_ld8s_i32(dst, tcg_env, offs); break; case ES_16 | MO_SIGN: - tcg_gen_ld16s_i32(dst, cpu_env, offs); + tcg_gen_ld16s_i32(dst, tcg_env, offs); break; case ES_32: case ES_32 | MO_SIGN: - tcg_gen_ld_i32(dst, cpu_env, offs); + tcg_gen_ld_i32(dst, tcg_env, offs); break; default: g_assert_not_reached(); @@ -129,16 +129,16 @@ static void write_vec_element_i64(TCGv_i64 src, int reg, uint8_t enr, switch (memop) { case ES_8: - tcg_gen_st8_i64(src, cpu_env, offs); + tcg_gen_st8_i64(src, tcg_env, offs); break; case ES_16: - tcg_gen_st16_i64(src, cpu_env, offs); + tcg_gen_st16_i64(src, tcg_env, offs); break; case ES_32: - tcg_gen_st32_i64(src, cpu_env, offs); + tcg_gen_st32_i64(src, tcg_env, offs); break; case ES_64: - tcg_gen_st_i64(src, cpu_env, offs); + tcg_gen_st_i64(src, tcg_env, offs); break; default: g_assert_not_reached(); @@ -152,13 +152,13 @@ static void write_vec_element_i32(TCGv_i32 src, int reg, uint8_t enr, switch (memop) { case ES_8: - tcg_gen_st8_i32(src, cpu_env, offs); + tcg_gen_st8_i32(src, tcg_env, offs); break; case ES_16: - tcg_gen_st16_i32(src, cpu_env, offs); + tcg_gen_st16_i32(src, tcg_env, offs); break; case ES_32: - tcg_gen_st_i32(src, cpu_env, offs); + tcg_gen_st_i32(src, tcg_env, offs); break; default: g_assert_not_reached(); @@ -173,16 +173,16 @@ static void get_vec_element_ptr_i64(TCGv_ptr ptr, uint8_t reg, TCGv_i64 enr, /* mask off invalid parts from the element nr */ tcg_gen_andi_i64(tmp, enr, NUM_VEC_ELEMENTS(es) - 1); - /* convert it to an element offset relative to cpu_env (vec_reg_offset() */ + /* convert it to an element offset relative to tcg_env (vec_reg_offset() */ tcg_gen_shli_i64(tmp, tmp, es); #if !HOST_BIG_ENDIAN tcg_gen_xori_i64(tmp, tmp, 8 - NUM_VEC_ELEMENT_BYTES(es)); #endif tcg_gen_addi_i64(tmp, tmp, vec_full_reg_offset(reg)); - /* generate the final ptr by adding cpu_env */ + /* generate the final ptr by adding tcg_env */ tcg_gen_trunc_i64_ptr(ptr, tmp); - tcg_gen_add_ptr(ptr, ptr, cpu_env); + tcg_gen_add_ptr(ptr, ptr, tcg_env); } #define gen_gvec_2(v1, v2, gen) \ @@ -754,8 +754,8 @@ static DisasJumpType op_vlbb(DisasContext *s, DisasOps *o) tcg_gen_ori_i64(bytes, o->addr1, -block_size); tcg_gen_neg_i64(bytes, bytes); - tcg_gen_addi_ptr(a0, cpu_env, v1_offs); - gen_helper_vll(cpu_env, a0, o->addr1, bytes); + tcg_gen_addi_ptr(a0, tcg_env, v1_offs); + gen_helper_vll(tcg_env, a0, o->addr1, bytes); return DISAS_NEXT; } @@ -812,8 +812,8 @@ static DisasJumpType op_vll(DisasContext *s, DisasOps *o) /* convert highest index into an actual length */ tcg_gen_addi_i64(o->in2, o->in2, 1); - tcg_gen_addi_ptr(a0, cpu_env, v1_offs); - gen_helper_vll(cpu_env, a0, o->addr1, o->in2); + tcg_gen_addi_ptr(a0, tcg_env, v1_offs); + gen_helper_vll(tcg_env, a0, o->addr1, o->in2); return DISAS_NEXT; } @@ -898,7 +898,7 @@ static DisasJumpType op_vpk(DisasContext *s, DisasOps *o) switch (s->fields.op2) { case 0x97: if (get_field(s, m5) & 0x1) { - gen_gvec_3_ptr(v1, v2, v3, cpu_env, 0, vpks_cc[es - 1]); + gen_gvec_3_ptr(v1, v2, v3, tcg_env, 0, vpks_cc[es - 1]); set_cc_static(s); } else { gen_gvec_3_ool(v1, v2, v3, 0, vpks[es - 1]); @@ -906,7 +906,7 @@ static DisasJumpType op_vpk(DisasContext *s, DisasOps *o) break; case 0x95: if (get_field(s, m5) & 0x1) { - gen_gvec_3_ptr(v1, v2, v3, cpu_env, 0, vpkls_cc[es - 1]); + gen_gvec_3_ptr(v1, v2, v3, tcg_env, 0, vpkls_cc[es - 1]); set_cc_static(s); } else { gen_gvec_3_ool(v1, v2, v3, 0, vpkls[es - 1]); @@ -1058,7 +1058,7 @@ static DisasJumpType op_vst(DisasContext *s, DisasOps *o) TCGv_i64 tmp; /* Probe write access before actually modifying memory */ - gen_helper_probe_write_access(cpu_env, o->addr1, + gen_helper_probe_write_access(tcg_env, o->addr1, tcg_constant_i64(16)); tmp = tcg_temp_new_i64(); @@ -1098,7 +1098,7 @@ static DisasJumpType op_vstbr(DisasContext *s, DisasOps *o) } /* Probe write access before actually modifying memory */ - gen_helper_probe_write_access(cpu_env, o->addr1, tcg_constant_i64(16)); + gen_helper_probe_write_access(tcg_env, o->addr1, tcg_constant_i64(16)); t0 = tcg_temp_new_i64(); t1 = tcg_temp_new_i64(); @@ -1169,7 +1169,7 @@ static DisasJumpType op_vster(DisasContext *s, DisasOps *o) } /* Probe write access before actually modifying memory */ - gen_helper_probe_write_access(cpu_env, o->addr1, tcg_constant_i64(16)); + gen_helper_probe_write_access(tcg_env, o->addr1, tcg_constant_i64(16)); /* Begin with the two doublewords swapped... */ t0 = tcg_temp_new_i64(); @@ -1211,7 +1211,7 @@ static DisasJumpType op_vstm(DisasContext *s, DisasOps *o) } /* Probe write access before actually modifying memory */ - gen_helper_probe_write_access(cpu_env, o->addr1, + gen_helper_probe_write_access(tcg_env, o->addr1, tcg_constant_i64((v3 - v1 + 1) * 16)); tmp = tcg_temp_new_i64(); @@ -1236,8 +1236,8 @@ static DisasJumpType op_vstl(DisasContext *s, DisasOps *o) /* convert highest index into an actual length */ tcg_gen_addi_i64(o->in2, o->in2, 1); - tcg_gen_addi_ptr(a0, cpu_env, v1_offs); - gen_helper_vstl(cpu_env, a0, o->addr1, o->in2); + tcg_gen_addi_ptr(a0, tcg_env, v1_offs); + gen_helper_vstl(tcg_env, a0, o->addr1, o->in2); return DISAS_NEXT; } @@ -2479,7 +2479,7 @@ static DisasJumpType op_vsum(DisasContext *s, DisasOps *o) static DisasJumpType op_vtm(DisasContext *s, DisasOps *o) { gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), - cpu_env, 0, gen_helper_gvec_vtm); + tcg_env, 0, gen_helper_gvec_vtm); set_cc_static(s); return DISAS_NEXT; } @@ -2505,7 +2505,7 @@ static DisasJumpType op_vfae(DisasContext *s, DisasOps *o) if (extract32(m5, 0, 1)) { gen_gvec_3_ptr(get_field(s, v1), get_field(s, v2), - get_field(s, v3), cpu_env, m5, g_cc[es]); + get_field(s, v3), tcg_env, m5, g_cc[es]); set_cc_static(s); } else { gen_gvec_3_ool(get_field(s, v1), get_field(s, v2), @@ -2536,7 +2536,7 @@ static DisasJumpType op_vfee(DisasContext *s, DisasOps *o) if (extract32(m5, 0, 1)) { gen_gvec_3_ptr(get_field(s, v1), get_field(s, v2), - get_field(s, v3), cpu_env, m5, g_cc[es]); + get_field(s, v3), tcg_env, m5, g_cc[es]); set_cc_static(s); } else { gen_gvec_3_ool(get_field(s, v1), get_field(s, v2), @@ -2567,7 +2567,7 @@ static DisasJumpType op_vfene(DisasContext *s, DisasOps *o) if (extract32(m5, 0, 1)) { gen_gvec_3_ptr(get_field(s, v1), get_field(s, v2), - get_field(s, v3), cpu_env, m5, g_cc[es]); + get_field(s, v3), tcg_env, m5, g_cc[es]); set_cc_static(s); } else { gen_gvec_3_ool(get_field(s, v1), get_field(s, v2), @@ -2598,7 +2598,7 @@ static DisasJumpType op_vistr(DisasContext *s, DisasOps *o) if (extract32(m5, 0, 1)) { gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), - cpu_env, 0, g_cc[es]); + tcg_env, 0, g_cc[es]); set_cc_static(s); } else { gen_gvec_2_ool(get_field(s, v1), get_field(s, v2), 0, @@ -2641,11 +2641,11 @@ static DisasJumpType op_vstrc(DisasContext *s, DisasOps *o) if (extract32(m6, 2, 1)) { gen_gvec_4_ptr(get_field(s, v1), get_field(s, v2), get_field(s, v3), get_field(s, v4), - cpu_env, m6, g_cc_rt[es]); + tcg_env, m6, g_cc_rt[es]); } else { gen_gvec_4_ptr(get_field(s, v1), get_field(s, v2), get_field(s, v3), get_field(s, v4), - cpu_env, m6, g_cc[es]); + tcg_env, m6, g_cc[es]); } set_cc_static(s); } else { @@ -2682,7 +2682,7 @@ static DisasJumpType op_vstrs(DisasContext *s, DisasOps *o) gen_gvec_4_ptr(get_field(s, v1), get_field(s, v2), get_field(s, v3), get_field(s, v4), - cpu_env, 0, fns[es][zs]); + tcg_env, 0, fns[es][zs]); set_cc_static(s); return DISAS_NEXT; } @@ -2780,7 +2780,7 @@ static DisasJumpType op_vfa(DisasContext *s, DisasOps *o) } gen_gvec_3_ptr(get_field(s, v1), get_field(s, v2), - get_field(s, v3), cpu_env, m5, fn); + get_field(s, v3), tcg_env, m5, fn); return DISAS_NEXT; } @@ -2822,7 +2822,7 @@ static DisasJumpType op_wfc(DisasContext *s, DisasOps *o) return DISAS_NORETURN; } - gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), cpu_env, 0, fn); + gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), tcg_env, 0, fn); set_cc_static(s); return DISAS_NEXT; } @@ -2893,7 +2893,7 @@ static DisasJumpType op_vfc(DisasContext *s, DisasOps *o) } gen_gvec_3_ptr(get_field(s, v1), get_field(s, v2), get_field(s, v3), - cpu_env, m5, fn); + tcg_env, m5, fn); if (cs) { set_cc_static(s); } @@ -3007,7 +3007,7 @@ static DisasJumpType op_vcdg(DisasContext *s, DisasOps *o) return DISAS_NORETURN; } - gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), cpu_env, + gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), tcg_env, deposit32(m4, 4, 4, erm), fn); return DISAS_NEXT; } @@ -3036,7 +3036,7 @@ static DisasJumpType op_vfll(DisasContext *s, DisasOps *o) return DISAS_NORETURN; } - gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), cpu_env, m4, fn); + gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), tcg_env, m4, fn); return DISAS_NEXT; } @@ -3080,7 +3080,7 @@ static DisasJumpType op_vfmax(DisasContext *s, DisasOps *o) } gen_gvec_3_ptr(get_field(s, v1), get_field(s, v2), get_field(s, v3), - cpu_env, deposit32(m5, 4, 4, m6), fn); + tcg_env, deposit32(m5, 4, 4, m6), fn); return DISAS_NEXT; } @@ -3169,7 +3169,7 @@ static DisasJumpType op_vfma(DisasContext *s, DisasOps *o) } gen_gvec_4_ptr(get_field(s, v1), get_field(s, v2), - get_field(s, v3), get_field(s, v4), cpu_env, m5, fn); + get_field(s, v3), get_field(s, v4), tcg_env, m5, fn); return DISAS_NEXT; } @@ -3291,7 +3291,7 @@ static DisasJumpType op_vfsq(DisasContext *s, DisasOps *o) return DISAS_NORETURN; } - gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), cpu_env, m4, fn); + gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), tcg_env, m4, fn); return DISAS_NEXT; } @@ -3325,7 +3325,7 @@ static DisasJumpType op_vftci(DisasContext *s, DisasOps *o) return DISAS_NORETURN; } - gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), cpu_env, + gen_gvec_2_ptr(get_field(s, v1), get_field(s, v2), tcg_env, deposit32(m5, 4, 12, i3), fn); set_cc_static(s); return DISAS_NEXT; |