diff options
| author | Richard Henderson <rth@twiddle.net> | 2016-11-16 11:30:34 +0100 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2017-01-10 08:06:11 -0800 |
| commit | 0f9712b117cae2d8f01475faea662c3e1b57d5f7 (patch) | |
| tree | 3fc53fc3abf3b0a85a1a9d491d2c497393168b0a /target/s390x | |
| parent | 9b8514e56efa59549ad642a494ba69e2b0ca4daf (diff) | |
target-s390x: Use clz opcode
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/s390x')
| -rw-r--r-- | target/s390x/helper.h | 1 | ||||
| -rw-r--r-- | target/s390x/int_helper.c | 6 | ||||
| -rw-r--r-- | target/s390x/translate.c | 2 |
3 files changed, 1 insertions, 8 deletions
diff --git a/target/s390x/helper.h b/target/s390x/helper.h index 207a6e7d1c..9102071d0a 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -70,7 +70,6 @@ DEF_HELPER_FLAGS_4(msdb, TCG_CALL_NO_WG, i64, env, i64, i64, i64) DEF_HELPER_FLAGS_3(tceb, TCG_CALL_NO_RWG_SE, i32, env, i64, i64) DEF_HELPER_FLAGS_3(tcdb, TCG_CALL_NO_RWG_SE, i32, env, i64, i64) DEF_HELPER_FLAGS_4(tcxb, TCG_CALL_NO_RWG_SE, i32, env, i64, i64, i64) -DEF_HELPER_FLAGS_1(clz, TCG_CALL_NO_RWG_SE, i64, i64) DEF_HELPER_FLAGS_2(sqeb, TCG_CALL_NO_WG, i64, env, i64) DEF_HELPER_FLAGS_2(sqdb, TCG_CALL_NO_WG, i64, env, i64) DEF_HELPER_FLAGS_3(sqxb, TCG_CALL_NO_WG, i64, env, i64, i64) diff --git a/target/s390x/int_helper.c b/target/s390x/int_helper.c index 370c94da55..5bc470bdc7 100644 --- a/target/s390x/int_helper.c +++ b/target/s390x/int_helper.c @@ -117,12 +117,6 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, return ret; } -/* count leading zeros, for find leftmost one */ -uint64_t HELPER(clz)(uint64_t v) -{ - return clz64(v); -} - uint64_t HELPER(cvd)(int32_t reg) { /* positive 0 */ diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 6cebb7e94e..01c62176bf 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -2249,7 +2249,7 @@ static ExitStatus op_flogr(DisasContext *s, DisasOps *o) gen_op_update1_cc_i64(s, CC_OP_FLOGR, o->in2); /* R1 = IN ? CLZ(IN) : 64. */ - gen_helper_clz(o->out, o->in2); + tcg_gen_clzi_i64(o->out, o->in2, 64); /* R1+1 = IN & ~(found bit). Note that we may attempt to shift this value by 64, which is undefined. But since the shift is 64 iff the |