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authorDavid Hildenbrand <david@redhat.com>2019-05-29 22:22:35 +0200
committerDavid Hildenbrand <david@redhat.com>2019-06-07 14:53:26 +0200
commit5938f20cb807b584799feef411a1906a9d8f7a1b (patch)
tree329747c99c970dc9c164bb6ee456930d33484e4b /target/s390x/translate_vx.inc.c
parent76e35cc7a52390d2743a9746a1bec29754f60306 (diff)
s390x/tcg: Implement VECTOR FP SQUARE ROOT
Simulate XxC=0 and ERM=0 (current mode), so we can use the existing helper function. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
Diffstat (limited to 'target/s390x/translate_vx.inc.c')
-rw-r--r--target/s390x/translate_vx.inc.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
index 9b8606ba25..75f3596c4b 100644
--- a/target/s390x/translate_vx.inc.c
+++ b/target/s390x/translate_vx.inc.c
@@ -2779,3 +2779,22 @@ static DisasJumpType op_vfpso(DisasContext *s, DisasOps *o)
}
return DISAS_NEXT;
}
+
+static DisasJumpType op_vfsq(DisasContext *s, DisasOps *o)
+{
+ const uint8_t fpf = get_field(s->fields, m3);
+ const uint8_t m4 = get_field(s->fields, m4);
+ gen_helper_gvec_2_ptr *fn = gen_helper_gvec_vfsq64;
+
+ if (fpf != FPF_LONG || extract32(m4, 0, 3)) {
+ gen_program_exception(s, PGM_SPECIFICATION);
+ return DISAS_NORETURN;
+ }
+
+ if (extract32(m4, 3, 1)) {
+ fn = gen_helper_gvec_vfsq64s;
+ }
+ gen_gvec_2_ptr(get_field(s->fields, v1), get_field(s->fields, v2), cpu_env,
+ 0, fn);
+ return DISAS_NEXT;
+}