diff options
| author | David Hildenbrand <david@redhat.com> | 2019-04-11 11:42:34 +0200 |
|---|---|---|
| committer | David Hildenbrand <david@redhat.com> | 2019-05-17 10:54:13 +0200 |
| commit | 8112274f86fa99f74b0ebe9e5173171f404babbb (patch) | |
| tree | f98af4798e572e66a4686b0131bb70bea78470e8 /target/s390x/translate_vx.inc.c | |
| parent | 5f724887e3dd9b3e3e0911115b79fcd4a20115f4 (diff) | |
s390x/tcg: Implement VECTOR SHIFT RIGHT LOGICAL *
Similar to VECTOR SHIFT RIGHT ARITHMETICAL.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
Diffstat (limited to 'target/s390x/translate_vx.inc.c')
| -rw-r--r-- | target/s390x/translate_vx.inc.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c index a5636f0733..5dfbf1bcd4 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -2106,3 +2106,20 @@ static DisasJumpType op_vsra(DisasContext *s, DisasOps *o) tcg_temp_free_i64(shift); return DISAS_NEXT; } + +static DisasJumpType op_vsrl(DisasContext *s, DisasOps *o) +{ + TCGv_i64 shift = tcg_temp_new_i64(); + + read_vec_element_i64(shift, get_field(s->fields, v3), 7, ES_8); + if (s->fields->op2 == 0x7c) { + tcg_gen_andi_i64(shift, shift, 0x7); + } else { + tcg_gen_andi_i64(shift, shift, 0x78); + } + + gen_gvec_2i_ool(get_field(s->fields, v1), get_field(s->fields, v2), + shift, 0, gen_helper_gvec_vsrl); + tcg_temp_free_i64(shift); + return DISAS_NEXT; +} |