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authorTony Nguyen <tony.nguyen@bt.com>2019-08-24 04:10:58 +1000
committerRichard Henderson <richard.henderson@linaro.org>2019-09-03 08:30:38 -0700
commit14776ab5a12972ea439c7fb2203a4c15a09094b4 (patch)
treeb53091625b410a722bf5f4e17a9631457994eed4 /target/s390x/translate.c
parentfec105c2abda8567ec15230429c41429b5ee307c (diff)
tcg: TCGMemOp is now accelerator independent MemOp
Preparation for collapsing the two byte swaps, adjust_endianness and handle_bswap, along the I/O path. Target dependant attributes are conditionalized upon NEED_CPU_H. Signed-off-by: Tony Nguyen <tony.nguyen@bt.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <81d9cd7d7f5aaadfa772d6c48ecee834e9cf7882.1566466906.git.tony.nguyen@bt.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/s390x/translate.c')
-rw-r--r--target/s390x/translate.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index ac0d8b6410..2927247c82 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -152,7 +152,7 @@ static inline int vec_full_reg_offset(uint8_t reg)
return offsetof(CPUS390XState, vregs[reg][0]);
}
-static inline int vec_reg_offset(uint8_t reg, uint8_t enr, TCGMemOp es)
+static inline int vec_reg_offset(uint8_t reg, uint8_t enr, MemOp es)
{
/* Convert element size (es) - e.g. MO_8 - to bytes */
const uint8_t bytes = 1 << es;
@@ -2262,7 +2262,7 @@ static DisasJumpType op_csst(DisasContext *s, DisasOps *o)
#ifndef CONFIG_USER_ONLY
static DisasJumpType op_csp(DisasContext *s, DisasOps *o)
{
- TCGMemOp mop = s->insn->data;
+ MemOp mop = s->insn->data;
TCGv_i64 addr, old, cc;
TCGLabel *lab = gen_new_label();
@@ -3228,7 +3228,7 @@ static DisasJumpType op_lm64(DisasContext *s, DisasOps *o)
static DisasJumpType op_lpd(DisasContext *s, DisasOps *o)
{
TCGv_i64 a1, a2;
- TCGMemOp mop = s->insn->data;
+ MemOp mop = s->insn->data;
/* In a parallel context, stop the world and single step. */
if (tb_cflags(s->base.tb) & CF_PARALLEL) {