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authorRichard Henderson <rth@twiddle.net>2017-06-16 16:35:34 -0700
committerRichard Henderson <rth@twiddle.net>2017-06-23 09:17:44 -0700
commit45aa9aa3b7730b38403553355b36a29f8905916a (patch)
tree7813fd052f679fa1b0126cd02ff2fcade28d0068 /target/s390x/translate.c
parente1a5d922b44946e0453189faff41464f95163c10 (diff)
target/s390x: Implement load-on-condition-2 insns
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/s390x/translate.c')
-rw-r--r--target/s390x/translate.c18
1 files changed, 15 insertions, 3 deletions
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index 802ccd9752..9932afb0f9 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -3641,7 +3641,7 @@ static ExitStatus op_sigp(DisasContext *s, DisasOps *o)
static ExitStatus op_soc(DisasContext *s, DisasOps *o)
{
DisasCompare c;
- TCGv_i64 a;
+ TCGv_i64 a, h;
TCGLabel *lab;
int r1;
@@ -3661,10 +3661,21 @@ static ExitStatus op_soc(DisasContext *s, DisasOps *o)
r1 = get_field(s->fields, r1);
a = get_address(s, 0, get_field(s->fields, b2), get_field(s->fields, d2));
- if (s->insn->data) {
+ switch (s->insn->data) {
+ case 1: /* STOCG */
tcg_gen_qemu_st64(regs[r1], a, get_mem_index(s));
- } else {
+ break;
+ case 0: /* STOC */
tcg_gen_qemu_st32(regs[r1], a, get_mem_index(s));
+ break;
+ case 2: /* STOCFH */
+ h = tcg_temp_new_i64();
+ tcg_gen_shri_i64(h, regs[r1], 32);
+ tcg_gen_qemu_st32(h, a, get_mem_index(s));
+ tcg_temp_free_i64(h);
+ break;
+ default:
+ g_assert_not_reached();
}
tcg_temp_free_i64(a);
@@ -5416,6 +5427,7 @@ enum DisasInsnEnum {
#define FAC_MIE S390_FEAT_STFLE_49 /* misc-instruction-extensions */
#define FAC_LAT S390_FEAT_STFLE_49 /* load-and-trap */
#define FAC_LOC S390_FEAT_STFLE_45 /* load/store on condition 1 */
+#define FAC_LOC2 S390_FEAT_STFLE_53 /* load/store on condition 2 */
#define FAC_LD S390_FEAT_LONG_DISPLACEMENT
#define FAC_PC S390_FEAT_STFLE_45 /* population count */
#define FAC_SCF S390_FEAT_STORE_CLOCK_FAST