diff options
author | David Hildenbrand <david@redhat.com> | 2018-09-27 15:03:00 +0200 |
---|---|---|
committer | Cornelia Huck <cohuck@redhat.com> | 2018-10-04 10:32:39 +0200 |
commit | db0504154ef1feedd135f25f8ca6e9abb5d00bbb (patch) | |
tree | ee70904a85e3986507ef6259a06b3b4ac3f46aa6 /target/s390x/translate.c | |
parent | ca5f31a0f27d265f2220ad43913f70280e8753a2 (diff) |
s390x/tcg: check for AFP-register, BFP and DFP data exceptions
With the annotated functions, we can now easily check this at a central
place.
DXC 1 is to be injected if an AFP register is used (for a HFP AND FPS
instruction) when AFP is disabled.
DXC 2 is to be injected if a BFP instruction is used when AFP is
disabled.
DXC 3 is to be injected if a DFP instruction is used when AFP is
disabled.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20180927130303.12236-7-david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Diffstat (limited to 'target/s390x/translate.c')
-rw-r--r-- | target/s390x/translate.c | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 49e5e2cc58..67049975fa 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -6094,6 +6094,11 @@ static const DisasInsn *extract_insn(CPUS390XState *env, DisasContext *s, return info; } +static bool is_afp_reg(int reg) +{ + return reg % 2 || reg > 6; +} + static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s) { const DisasInsn *insn; @@ -6120,6 +6125,34 @@ static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s) } #endif + /* process flags */ + if (insn->flags) { + /* if AFP is not enabled, instructions and registers are forbidden */ + if (!(s->base.tb->flags & FLAG_MASK_AFP)) { + uint8_t dxc = 0; + + if ((insn->flags & IF_AFP1) && is_afp_reg(get_field(&f, r1))) { + dxc = 1; + } + if ((insn->flags & IF_AFP2) && is_afp_reg(get_field(&f, r2))) { + dxc = 1; + } + if ((insn->flags & IF_AFP3) && is_afp_reg(get_field(&f, r3))) { + dxc = 1; + } + if (insn->flags & IF_BFP) { + dxc = 2; + } + if (insn->flags & IF_DFP) { + dxc = 3; + } + if (dxc) { + gen_data_exception(dxc); + return DISAS_NORETURN; + } + } + } + /* Check for insn specification exceptions. */ if (insn->spec) { int spec = insn->spec, excp = 0, r; |