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author | Aurelien Jarno <aurelien@aurel32.net> | 2017-06-01 00:01:27 +0200 |
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committer | Richard Henderson <rth@twiddle.net> | 2017-06-06 15:20:44 -0700 |
commit | 4065ae7634601dfd8be8138fdad5562f798c4f5c (patch) | |
tree | 0b169bde31816a126bbe62135ff2455466cb6531 /target/s390x/translate.c | |
parent | 5d4a655a4187a0fe245b8bbaa1cf4ce9de5b4aea (diff) |
target/s390x: implement TRANSLATE ONE/TWO TO ONE/TWO
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Message-Id: <20170531220129.27724-29-aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/s390x/translate.c')
-rw-r--r-- | target/s390x/translate.c | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 2253ce68e3..9f3443ed6f 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -4340,6 +4340,36 @@ static ExitStatus op_trt(DisasContext *s, DisasOps *o) return NO_EXIT; } +static ExitStatus op_trXX(DisasContext *s, DisasOps *o) +{ + TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1)); + TCGv_i32 r2 = tcg_const_i32(get_field(s->fields, r2)); + TCGv_i32 sizes = tcg_const_i32(s->insn->opc & 3); + TCGv_i32 tst = tcg_temp_new_i32(); + int m3 = get_field(s->fields, m3); + + /* XXX: the C bit in M3 should be considered as 0 when the + ETF2-enhancement facility is not installed. */ + if (m3 & 1) { + tcg_gen_movi_i32(tst, -1); + } else { + tcg_gen_extrl_i64_i32(tst, regs[0]); + if (s->insn->opc & 3) { + tcg_gen_ext8u_i32(tst, tst); + } else { + tcg_gen_ext16u_i32(tst, tst); + } + } + gen_helper_trXX(cc_op, cpu_env, r1, r2, tst, sizes); + + tcg_temp_free_i32(r1); + tcg_temp_free_i32(r2); + tcg_temp_free_i32(sizes); + tcg_temp_free_i32(tst); + set_cc_static(s); + return NO_EXIT; +} + static ExitStatus op_ts(DisasContext *s, DisasOps *o) { TCGv_i32 t1 = tcg_const_i32(0xff); |