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authorRichard Henderson <rth@twiddle.net>2017-06-16 17:37:59 -0700
committerRichard Henderson <rth@twiddle.net>2017-06-23 09:17:44 -0700
commit3c39c800bf8fb22222372f9ae84423f966f6da98 (patch)
tree3ca001a20ec9a33e6037869300582ad28ca4c0c8 /target/s390x/translate.c
parentafa26f3bae18992cc9598a2cb1a9a09d2e813f76 (diff)
target/s390x: Finish implementing ETF2-ENH
Missed the proper alignment in TRTO/TRTT, and ignoring the M3 field for all TRXX insns without ETF2-ENH. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/s390x/translate.c')
-rw-r--r--target/s390x/translate.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index 72af76df27..a3414c0616 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -4356,8 +4356,9 @@ static ExitStatus op_trXX(DisasContext *s, DisasOps *o)
TCGv_i32 tst = tcg_temp_new_i32();
int m3 = get_field(s->fields, m3);
- /* XXX: the C bit in M3 should be considered as 0 when the
- ETF2-enhancement facility is not installed. */
+ if (!s390_has_feat(S390_FEAT_ETF2_ENH)) {
+ m3 = 0;
+ }
if (m3 & 1) {
tcg_gen_movi_i32(tst, -1);
} else {