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authorAurelien Jarno <aurelien@aurel32.net>2017-06-01 00:01:02 +0200
committerRichard Henderson <rth@twiddle.net>2017-06-06 14:34:32 -0700
commit1f58720c5fd033e4e2de1d047020b43a3cb3aa1b (patch)
treeed90553858175dfd9ace0b06a18bd35d9b807464 /target/s390x/mem_helper.c
parent8a4719f527484a7b9940e1c93690b01dc5ca5144 (diff)
target/s390x: implement local-TLB-clearing in IPTE
And at the same time make IPTE SMP aware. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-4-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/s390x/mem_helper.c')
-rw-r--r--target/s390x/mem_helper.c21
1 files changed, 13 insertions, 8 deletions
diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index 0ebd65d9ab..ddbebcd7ae 100644
--- a/target/s390x/mem_helper.c
+++ b/target/s390x/mem_helper.c
@@ -1073,17 +1073,16 @@ uint32_t HELPER(mvcp)(CPUS390XState *env, uint64_t l, uint64_t a1, uint64_t a2)
}
/* invalidate pte */
-void HELPER(ipte)(CPUS390XState *env, uint64_t pto, uint64_t vaddr)
+void HELPER(ipte)(CPUS390XState *env, uint64_t pto, uint64_t vaddr,
+ uint32_t m4)
{
CPUState *cs = CPU(s390_env_get_cpu(env));
uint64_t page = vaddr & TARGET_PAGE_MASK;
uint64_t pte_addr, pte;
- /* XXX broadcast to other CPUs */
-
/* Compute the page table entry address */
pte_addr = (pto & _SEGMENT_ENTRY_ORIGIN);
- pte_addr += (vaddr & _VADDR_PX) >> 9;
+ pte_addr += (vaddr & VADDR_PX) >> 9;
/* Mark the page table entry as invalid */
pte = ldq_phys(cs->as, pte_addr);
@@ -1092,13 +1091,19 @@ void HELPER(ipte)(CPUS390XState *env, uint64_t pto, uint64_t vaddr)
/* XXX we exploit the fact that Linux passes the exact virtual
address here - it's not obliged to! */
- tlb_flush_page(cs, page);
+ /* XXX: the LC bit should be considered as 0 if the local-TLB-clearing
+ facility is not installed. */
+ if (m4 & 1) {
+ tlb_flush_page(cs, page);
+ } else {
+ tlb_flush_page_all_cpus_synced(cs, page);
+ }
/* XXX 31-bit hack */
- if (page & 0x80000000) {
- tlb_flush_page(cs, page & ~0x80000000);
+ if (m4 & 1) {
+ tlb_flush_page(cs, page ^ 0x80000000);
} else {
- tlb_flush_page(cs, page | 0x80000000);
+ tlb_flush_page_all_cpus_synced(cs, page ^ 0x80000000);
}
}