diff options
| author | Richard Henderson <rth@twiddle.net> | 2017-06-16 16:47:51 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2017-06-23 09:17:44 -0700 |
| commit | c2a5c1d718eabfde04ebabf2434168b0716107cb (patch) | |
| tree | db6c045119028337f25f314bfb2a81af456ef5e9 /target/s390x/insn-data.def | |
| parent | 45aa9aa3b7730b38403553355b36a29f8905916a (diff) | |
target/s390x: Implement load-and-zero-rightmost-byte insns
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/s390x/insn-data.def')
| -rw-r--r-- | target/s390x/insn-data.def | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index c8ad4da531..05556864a2 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -427,6 +427,11 @@ /* LOAD AND TRAP */ C(0xe39f, LAT, RXY_a, LAT, 0, m2_32u, r1, 0, lat, 0) C(0xe385, LGAT, RXY_a, LAT, 0, a2, r1, 0, lgat, 0) +/* LOAD AND ZERO RIGHTMOST BYTE */ + C(0xe3eb, LZRF, RXY_a, LZRB, 0, m2_32u, new, r1_32, lzrb, 0) + C(0xe32a, LZRG, RXY_a, LZRB, 0, m2_64, r1, 0, lzrb, 0) +/* LOAD LOGICAL AND ZERO RIGHTMOST BYTE */ + C(0xe33a, LLZRGF, RXY_a, LZRB, 0, m2_32u, r1, 0, lzrb, 0) /* LOAD BYTE */ C(0xb926, LBR, RRE, EI, 0, r2_8s, 0, r1_32, mov2, 0) C(0xb906, LGBR, RRE, EI, 0, r2_8s, 0, r1, mov2, 0) |