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authorLIU Zhiwei <zhiwei_liu@c-sky.com>2020-07-01 23:25:49 +0800
committerAlistair Francis <alistair.francis@wdc.com>2020-07-02 09:19:34 -0700
commit6bf91617f47c74efc99ef48236765d9677c0898e (patch)
tree78e8e5c93d12d02ad2c315138699dda069baf742 /target/s390x/cpu_features_def.inc.h
parent31bf42a26cf8b1e02f27acd302ee0ef14e877682 (diff)
target/riscv: configure and turn on vector extension from command line
Vector extension is default off. The only way to use vector extension is 1. use cpu rv32 or rv64 2. turn on it by command line "-cpu rv64,x-v=true,vlen=128,elen=64,vext_spec=v0.7.1". vlen is the vector register length, default value is 128 bit. elen is the max operator size in bits, default value is 64 bit. vext_spec is the vector specification version, default value is v0.7.1. These properties can be specified with other values. Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200701152549.1218-62-zhiwei_liu@c-sky.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/s390x/cpu_features_def.inc.h')
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