diff options
| author | LIU Zhiwei <zhiwei_liu@linux.alibaba.com> | 2023-06-12 13:10:27 +0200 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2023-07-10 22:29:14 +1000 |
| commit | 94692c3a34d9e2e149bd9db188425e9da6e578c6 (patch) | |
| tree | f6c20dfec129a1d46c55f620128dc23aa22d51a3 /target/riscv | |
| parent | fcb237e64f9d026c03d635579c7b288d0008a6e5 (diff) | |
target/riscv: Use xl instead of mxl for disassemble
Disassemble function(plugin_disas, target_disas, monitor_disas) will
always call set_disas_info before disassembling instructions.
plugin_disas and target_disas will always be called under a TB, which
has the same XLEN.
We can't ensure that monitor_disas will always be called under a TB,
but current XLEN will still be a better choice, thus we can ensure at
least the disassemble of the nearest one TB is right.
Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Message-Id: <20230612111034.3955227-2-christoph.muellner@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv')
| -rw-r--r-- | target/riscv/cpu.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 4035fe0e62..3faf703131 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -858,9 +858,10 @@ static void riscv_cpu_reset_hold(Object *obj) static void riscv_cpu_disas_set_info(CPUState *s, disassemble_info *info) { RISCVCPU *cpu = RISCV_CPU(s); + CPURISCVState *env = &cpu->env; info->target_info = &cpu->cfg; - switch (riscv_cpu_mxl(&cpu->env)) { + switch (env->xl) { case MXL_RV32: info->print_insn = print_insn_riscv32; break; |