diff options
author | Markus Armbruster <armbru@redhat.com> | 2022-11-22 14:49:16 +0100 |
---|---|---|
committer | Markus Armbruster <armbru@redhat.com> | 2022-12-14 16:19:35 +0100 |
commit | 66997c42e02c84481fc162a5b7bd6ad6c643bae2 (patch) | |
tree | 889d4e08622f178c74334c3317ccc8a0ca8431c3 /target/riscv | |
parent | 10220d2f96406463fc283a3de6b13fc38f8befff (diff) |
cleanup: Tweak and re-run return_directly.cocci
Tweak the semantic patch to drop redundant parenthesis around the
return expression.
Coccinelle drops a comment in hw/rdma/vmw/pvrdma_cmd.c; restored
manually.
Coccinelle messes up vmdk_co_create(), not sure why. Change dropped,
will be done manually in the next commit.
Line breaks in target/avr/cpu.h and hw/rdma/vmw/pvrdma_cmd.c tidied up
manually.
Whitespace in tools/virtiofsd/fuse_lowlevel.c tidied up manually.
checkpatch.pl complains "return of an errno should typically be -ve"
two times for hw/9pfs/9p-synth.c. Preexisting, the patch merely makes
it visible to checkpatch.pl.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20221122134917.1217307-2-armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Diffstat (limited to 'target/riscv')
-rw-r--r-- | target/riscv/debug.c | 6 | ||||
-rw-r--r-- | target/riscv/vector_helper.c | 28 |
2 files changed, 9 insertions, 25 deletions
diff --git a/target/riscv/debug.c b/target/riscv/debug.c index 26ea764407..e44848d0d7 100644 --- a/target/riscv/debug.c +++ b/target/riscv/debug.c @@ -243,15 +243,13 @@ static void do_trigger_action(CPURISCVState *env, target_ulong trigger_index) static uint32_t type2_breakpoint_size(CPURISCVState *env, target_ulong ctrl) { - uint32_t size, sizelo, sizehi = 0; + uint32_t sizelo, sizehi = 0; if (riscv_cpu_mxl(env) == MXL_RV64) { sizehi = extract32(ctrl, 21, 2); } sizelo = extract32(ctrl, 16, 2); - size = (sizehi << 2) | sizelo; - - return size; + return (sizehi << 2) | sizelo; } static inline bool type2_breakpoint_enabled(target_ulong ctrl) diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 0020b9a95d..00de879787 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -2791,31 +2791,25 @@ static inline uint16_t vssrl16(CPURISCVState *env, int vxrm, uint16_t a, uint16_t b) { uint8_t round, shift = b & 0xf; - uint16_t res; round = get_round(vxrm, a, shift); - res = (a >> shift) + round; - return res; + return (a >> shift) + round; } static inline uint32_t vssrl32(CPURISCVState *env, int vxrm, uint32_t a, uint32_t b) { uint8_t round, shift = b & 0x1f; - uint32_t res; round = get_round(vxrm, a, shift); - res = (a >> shift) + round; - return res; + return (a >> shift) + round; } static inline uint64_t vssrl64(CPURISCVState *env, int vxrm, uint64_t a, uint64_t b) { uint8_t round, shift = b & 0x3f; - uint64_t res; round = get_round(vxrm, a, shift); - res = (a >> shift) + round; - return res; + return (a >> shift) + round; } RVVCALL(OPIVV2_RM, vssrl_vv_b, OP_UUU_B, H1, H1, H1, vssrl8) RVVCALL(OPIVV2_RM, vssrl_vv_h, OP_UUU_H, H2, H2, H2, vssrl16) @@ -2839,41 +2833,33 @@ static inline int8_t vssra8(CPURISCVState *env, int vxrm, int8_t a, int8_t b) { uint8_t round, shift = b & 0x7; - int8_t res; round = get_round(vxrm, a, shift); - res = (a >> shift) + round; - return res; + return (a >> shift) + round; } static inline int16_t vssra16(CPURISCVState *env, int vxrm, int16_t a, int16_t b) { uint8_t round, shift = b & 0xf; - int16_t res; round = get_round(vxrm, a, shift); - res = (a >> shift) + round; - return res; + return (a >> shift) + round; } static inline int32_t vssra32(CPURISCVState *env, int vxrm, int32_t a, int32_t b) { uint8_t round, shift = b & 0x1f; - int32_t res; round = get_round(vxrm, a, shift); - res = (a >> shift) + round; - return res; + return (a >> shift) + round; } static inline int64_t vssra64(CPURISCVState *env, int vxrm, int64_t a, int64_t b) { uint8_t round, shift = b & 0x3f; - int64_t res; round = get_round(vxrm, a, shift); - res = (a >> shift) + round; - return res; + return (a >> shift) + round; } RVVCALL(OPIVV2_RM, vssra_vv_b, OP_SSS_B, H1, H1, H1, vssra8) |