aboutsummaryrefslogtreecommitdiff
path: root/target/riscv
diff options
context:
space:
mode:
authorEmilio G. Cota <cota@braap.org>2018-04-10 11:11:04 -0400
committerRichard Henderson <richard.henderson@linaro.org>2018-05-09 10:12:21 -0700
commit33572269a54ba6339ce00537abfa434e4ffc95c2 (patch)
tree152d2d50816a645bc043e2ca99f008212caf1bac /target/riscv
parente5cd695266c5709308aa95b1baae499e4b5d4544 (diff)
target/riscv: avoid integer overflow in next_page PC check
If the PC is in the last page of the address space, next_page_start overflows to 0. Fix it. Reported-by: Richard Henderson <richard.henderson@linaro.org> Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Michael Clark <mjc@sifive.com> Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Michael Clark <mjc@sifive.com> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/riscv')
-rw-r--r--target/riscv/translate.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index c0e6a044d3..a98033ca77 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -1850,11 +1850,11 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
CPURISCVState *env = cs->env_ptr;
DisasContext ctx;
target_ulong pc_start;
- target_ulong next_page_start;
+ target_ulong page_start;
int num_insns;
int max_insns;
pc_start = tb->pc;
- next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
+ page_start = pc_start & TARGET_PAGE_MASK;
ctx.pc = pc_start;
/* once we have GDB, the rest of the translate.c implementation should be
@@ -1904,7 +1904,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
if (cs->singlestep_enabled) {
break;
}
- if (ctx.pc >= next_page_start) {
+ if (ctx.pc - page_start >= TARGET_PAGE_SIZE) {
break;
}
if (tcg_op_buf_full()) {