diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2018-05-31 14:50:52 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-05-31 14:50:52 +0100 |
| commit | bc6b1cec84618bf977a451eac30ed1ee4c735963 (patch) | |
| tree | 17b62b24ca89c8328e9783b3cb836092ae5cb808 /target/riscv | |
| parent | c874dc4f5e8ffae46ddaf2a0f223269f23f3a00d (diff) | |
Make address_space_translate{, _cached}() take a MemTxAttrs argument
As part of plumbing MemTxAttrs down to the IOMMU translate method,
add MemTxAttrs as an argument to address_space_translate()
and address_space_translate_cached(). Callers either have an
attrs value to hand, or don't care and can use MEMTXATTRS_UNSPECIFIED.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180521140402.23318-4-peter.maydell@linaro.org
Diffstat (limited to 'target/riscv')
| -rw-r--r-- | target/riscv/helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/riscv/helper.c b/target/riscv/helper.c index 95889f23b9..29e1a603dc 100644 --- a/target/riscv/helper.c +++ b/target/riscv/helper.c @@ -210,7 +210,7 @@ restart: MemoryRegion *mr; hwaddr l = sizeof(target_ulong), addr1; mr = address_space_translate(cs->as, pte_addr, - &addr1, &l, false); + &addr1, &l, false, MEMTXATTRS_UNSPECIFIED); if (memory_access_is_direct(mr, true)) { target_ulong *pte_pa = qemu_map_ram_ptr(mr->ram_block, addr1); |