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authorBastian Koppelmann <kbastian@mail.uni-paderborn.de>2019-02-13 07:53:45 -0800
committerBastian Koppelmann <kbastian@mail.uni-paderborn.de>2019-03-13 10:34:06 +0100
commitb73a987b09ad5081123dc6b1e8e6c8305a1c8673 (patch)
tree2f354eb5b39c7a8a69ce40e1471e79b302c0077b /target/riscv/translate.c
parent7e45a682edc32ba90d6955215f062210531b835b (diff)
target/riscv: Convert RVXI arithmetic insns to decodetree
we cannot remove the call to gen_arith() in decode_RV32_64G() since it is used to translate multiply instructions. Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
Diffstat (limited to 'target/riscv/translate.c')
-rw-r--r--target/riscv/translate.c9
1 files changed, 0 insertions, 9 deletions
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 2e35142ca2..1ae84dcd59 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -1908,15 +1908,6 @@ static void decode_RV32_64G(DisasContext *ctx)
imm = GET_IMM(ctx->opcode);
switch (op) {
- case OPC_RISC_ARITH_IMM:
-#if defined(TARGET_RISCV64)
- case OPC_RISC_ARITH_IMM_W:
-#endif
- if (rd == 0) {
- break; /* NOP */
- }
- gen_arith_imm(ctx, MASK_OP_ARITH_IMM(ctx->opcode), rd, rs1, imm);
- break;
case OPC_RISC_ARITH:
#if defined(TARGET_RISCV64)
case OPC_RISC_ARITH_W: