diff options
| author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2024-01-05 20:05:37 -0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-02-09 11:05:27 +1000 |
| commit | fae0b5336004efcdc1dbaa0734dd89f73e5e5be5 (patch) | |
| tree | b208ed6444ab17da88644c06330ffa2790c4f8ea /target/riscv/tcg/tcg-cpu.c | |
| parent | 41f2b94ee067b00993b0dd6c7ad3c681b093a30a (diff) | |
target/riscv: move 'vlen' to riscv_cpu_properties[]
Turning 'vlen' into a class property will allow its default value to be
overwritten by cpu_init() later on, solving the issue we have now where
CPU specific settings are getting overwritten by the default.
Common validation bits are moved from riscv_cpu_validate_v() to
prop_vlen_set() to be shared with KVM.
And, as done with every option we migrated to riscv_cpu_properties[],
vendor CPUs can't have their 'vlen' value changed.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Tested-by: Vladimir Isaev <vladimir.isaev@syntacore.com>
Message-ID: <20240105230546.265053-9-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/tcg/tcg-cpu.c')
| -rw-r--r-- | target/riscv/tcg/tcg-cpu.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 9820612f36..eb182ca876 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -298,11 +298,6 @@ static void riscv_cpu_validate_misa_mxl(RISCVCPU *cpu, Error **errp) static void riscv_cpu_validate_v(CPURISCVState *env, RISCVCPUConfig *cfg, Error **errp) { - if (!is_power_of_2(cfg->vlen)) { - error_setg(errp, "Vector extension VLEN must be power of 2"); - return; - } - if (cfg->vlen > RV_VLEN_MAX || cfg->vlen < 128) { error_setg(errp, "Vector extension implementation only supports VLEN " |