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authorRob Bradford <rbradford@rivosinc.com>2023-10-31 15:37:15 +0000
committerAlistair Francis <alistair.francis@wdc.com>2023-11-07 11:06:02 +1000
commit2571a6427c4ded57e44d4c6cf92376d869a75a5c (patch)
treebcec662289cc1659737cd0bb5204a65ee89373d9 /target/riscv/pmu.c
parent7c1bb1d8d412f03ec7d6042971892bd0dff222b7 (diff)
target/riscv: Use existing PMU counter mask in FDT generation
During the FDT generation use the existing mask containing the enabled counters rather then generating a new one. Using the existing mask will support the use of discontinuous counters. Signed-off-by: Rob Bradford <rbradford@rivosinc.com> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Message-ID: <20231031154000.18134-4-rbradford@rivosinc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/pmu.c')
-rw-r--r--target/riscv/pmu.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/target/riscv/pmu.c b/target/riscv/pmu.c
index 13801ccb78..7ddf4977b1 100644
--- a/target/riscv/pmu.c
+++ b/target/riscv/pmu.c
@@ -34,13 +34,9 @@
* to provide the correct value as well. Heterogeneous PMU per hart is not
* supported yet. Thus, number of counters are same across all harts.
*/
-void riscv_pmu_generate_fdt_node(void *fdt, int num_ctrs, char *pmu_name)
+void riscv_pmu_generate_fdt_node(void *fdt, uint32_t cmask, char *pmu_name)
{
uint32_t fdt_event_ctr_map[15] = {};
- uint32_t cmask;
-
- /* All the programmable counters can map to any event */
- cmask = MAKE_32BIT_MASK(3, num_ctrs);
/*
* The event encoding is specified in the SBI specification