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authorFrank Chang <frank.chang@sifive.com>2021-12-10 15:55:58 +0800
committerAlistair Francis <alistair.francis@wdc.com>2021-12-20 14:51:36 +1000
commitf9298de51432148163d8ed9c2b15bc0096546c07 (patch)
treeb94096d73152dfc3b35ef6b3390c6e914764e91a /target/riscv/internals.h
parent6bc3dfa96de4173b12929824eaf80fc95d22ac28 (diff)
target/riscv: rvv-1.0: remove MLEN calculations
As in RVV 1.0 design, MLEN is hardcoded with value 1 (Section 4.5). Thus, remove all MLEN related calculations. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20211210075704.23951-13-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/internals.h')
-rw-r--r--target/riscv/internals.h9
1 files changed, 4 insertions, 5 deletions
diff --git a/target/riscv/internals.h b/target/riscv/internals.h
index bce91da11a..81f5dfa477 100644
--- a/target/riscv/internals.h
+++ b/target/riscv/internals.h
@@ -22,11 +22,10 @@
#include "hw/registerfields.h"
/* share data between vector helpers and decode code */
-FIELD(VDATA, MLEN, 0, 8)
-FIELD(VDATA, VM, 8, 1)
-FIELD(VDATA, LMUL, 9, 2)
-FIELD(VDATA, NF, 11, 4)
-FIELD(VDATA, WD, 11, 1)
+FIELD(VDATA, VM, 0, 1)
+FIELD(VDATA, LMUL, 1, 3)
+FIELD(VDATA, NF, 4, 4)
+FIELD(VDATA, WD, 4, 1)
/* float point classify helpers */
target_ulong fclass_h(uint64_t frs1);