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authorKito Cheng <kito.cheng@sifive.com>2021-05-06 00:06:03 +0800
committerAlistair Francis <alistair.francis@wdc.com>2021-06-08 09:59:43 +1000
commit438240185a9456747b19a29290018316271a3762 (patch)
tree61d4bf60b5f37ae5f813673155fa163265725af4 /target/riscv/internals.h
parent00718208c127315d82f1f1f8383ef29bc478628e (diff)
target/riscv: rvb: count leading/trailing zeros
Signed-off-by: Kito Cheng <kito.cheng@sifive.com> Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210505160620.15723-3-frank.chang@sifive.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/internals.h')
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