diff options
| author | Frank Chang <frank.chang@sifive.com> | 2021-05-06 00:06:13 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2021-06-08 09:59:45 +1000 |
| commit | 831ec7f3d1ede387eca225ccaccb2845cbbca85e (patch) | |
| tree | 5a06a79165f54f1c0e7bd5833f41d531dc005479 /target/riscv/insn_trans | |
| parent | e58529a8d03ab8e9127f3e7cdf757ff84af75698 (diff) | |
target/riscv: rvb: generalized reverse
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210505160620.15723-13-frank.chang@sifive.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/insn_trans')
| -rw-r--r-- | target/riscv/insn_trans/trans_rvb.c.inc | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_trans/trans_rvb.c.inc index 429738db15..281e0ffae9 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -197,6 +197,23 @@ static bool trans_rol(DisasContext *ctx, arg_rol *a) return gen_shift(ctx, a, tcg_gen_rotl_tl); } +static bool trans_grev(DisasContext *ctx, arg_grev *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_shift(ctx, a, gen_helper_grev); +} + +static bool trans_grevi(DisasContext *ctx, arg_grevi *a) +{ + REQUIRE_EXT(ctx, RVB); + + if (a->shamt >= TARGET_LONG_BITS) { + return false; + } + + return gen_grevi(ctx, a); +} + static bool trans_clzw(DisasContext *ctx, arg_clzw *a) { REQUIRE_64BIT(ctx); @@ -329,3 +346,17 @@ static bool trans_rolw(DisasContext *ctx, arg_rolw *a) REQUIRE_EXT(ctx, RVB); return gen_shiftw(ctx, a, gen_rolw); } + +static bool trans_grevw(DisasContext *ctx, arg_grevw *a) +{ + REQUIRE_64BIT(ctx); + REQUIRE_EXT(ctx, RVB); + return gen_shiftw(ctx, a, gen_grevw); +} + +static bool trans_greviw(DisasContext *ctx, arg_greviw *a) +{ + REQUIRE_64BIT(ctx); + REQUIRE_EXT(ctx, RVB); + return gen_shiftiw(ctx, a, gen_grevw); +} |