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authorLIU Zhiwei <zhiwei_liu@c-sky.com>2020-07-01 23:25:36 +0800
committerAlistair Francis <alistair.francis@wdc.com>2020-07-02 09:19:33 -0700
commit696b0c260a0312c865cd0e4a8f09d0b9f13b07c9 (patch)
treea92e96c5e3ea0f79a0c18562f136ba5c3d9378e0 /target/riscv/insn32.decode
parent523547f19e3914f11543e2da03907c724f15cd5e (diff)
target/riscv: vector widening floating-point reduction instructions
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20200701152549.1218-49-zhiwei_liu@c-sky.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/insn32.decode')
-rw-r--r--target/riscv/insn32.decode2
1 files changed, 2 insertions, 0 deletions
diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode
index 986308e99a..2668d483a7 100644
--- a/target/riscv/insn32.decode
+++ b/target/riscv/insn32.decode
@@ -545,6 +545,8 @@ vwredsum_vs 110001 . ..... ..... 000 ..... 1010111 @r_vm
vfredsum_vs 0000-1 . ..... ..... 001 ..... 1010111 @r_vm
vfredmin_vs 000101 . ..... ..... 001 ..... 1010111 @r_vm
vfredmax_vs 000111 . ..... ..... 001 ..... 1010111 @r_vm
+# Vector widening ordered and unordered float reduction sum
+vfwredsum_vs 1100-1 . ..... ..... 001 ..... 1010111 @r_vm
vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm
vsetvl 1000000 ..... ..... 111 ..... 1010111 @r